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NRF52820-QDAA-R Datasheet(PDF) 95 Page - Nordic Semiconductor |
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NRF52820-QDAA-R Datasheet(HTML) 95 Page - Nordic Semiconductor |
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95 / 437 page ![]() Peripherals Access control to a configured region is enforced by the hardware two CPU clock cycles after the ADDR, SIZE, and PERM registers for an ACL instance have been successfully written. The protection is only enforced if a valid start address of the flash page boundary is written into the ADDR register, and the values of the SIZE and PERM registers are not zero. The ADDR, SIZE, and PERM registers can only be written once. All ACL configuration registers are cleared on reset (by resetting the device from any reset source), which is also the only way of clearing the configuration registers. To ensure that the desired permission schemes are always enforced by the ACL peripheral, the device boot sequence must perform the necessary configuration. Debugger read access to a read-protected region will be Read-As-Zero (RAZ), while debugger write access to a write-protected region will be Write-Ignored (WI). 6.3.1 Registers Base address Peripheral Instance Description Configuration 0x4001E000 ACL ACL Access control lists Table 25: Instances Register Offset Description ACL[0].ADDR 0x800 Start address of region to protect. The start address must be word-aligned. ACL[0].SIZE 0x804 Size of region to protect counting from address ACL[0].ADDR. Write '0' as no effect. ACL[0].PERM 0x808 Access permissions for region 0 as defined by start address ACL[0].ADDR and size ACL[0].SIZE ACL[0].UNUSED0 0x80C Reserved ACL[1].ADDR 0x810 Start address of region to protect. The start address must be word-aligned. ACL[1].SIZE 0x814 Size of region to protect counting from address ACL[1].ADDR. Write '0' as no effect. ACL[1].PERM 0x818 Access permissions for region 1 as defined by start address ACL[1].ADDR and size ACL[1].SIZE ACL[1].UNUSED0 0x81C Reserved ACL[2].ADDR 0x820 Start address of region to protect. The start address must be word-aligned. ACL[2].SIZE 0x824 Size of region to protect counting from address ACL[2].ADDR. Write '0' as no effect. ACL[2].PERM 0x828 Access permissions for region 2 as defined by start address ACL[2].ADDR and size ACL[2].SIZE ACL[2].UNUSED0 0x82C Reserved ACL[3].ADDR 0x830 Start address of region to protect. The start address must be word-aligned. ACL[3].SIZE 0x834 Size of region to protect counting from address ACL[3].ADDR. Write '0' as no effect. ACL[3].PERM 0x838 Access permissions for region 3 as defined by start address ACL[3].ADDR and size ACL[3].SIZE ACL[3].UNUSED0 0x83C Reserved ACL[4].ADDR 0x840 Start address of region to protect. The start address must be word-aligned. ACL[4].SIZE 0x844 Size of region to protect counting from address ACL[4].ADDR. Write '0' as no effect. ACL[4].PERM 0x848 Access permissions for region 4 as defined by start address ACL[4].ADDR and size ACL[4].SIZE ACL[4].UNUSED0 0x84C Reserved ACL[5].ADDR 0x850 Start address of region to protect. The start address must be word-aligned. ACL[5].SIZE 0x854 Size of region to protect counting from address ACL[5].ADDR. Write '0' as no effect. ACL[5].PERM 0x858 Access permissions for region 5 as defined by start address ACL[5].ADDR and size ACL[5].SIZE ACL[5].UNUSED0 0x85C Reserved ACL[6].ADDR 0x860 Start address of region to protect. The start address must be word-aligned. ACL[6].SIZE 0x864 Size of region to protect counting from address ACL[6].ADDR. Write '0' as no effect. ACL[6].PERM 0x868 Access permissions for region 6 as defined by start address ACL[6].ADDR and size ACL[6].SIZE ACL[6].UNUSED0 0x86C Reserved ACL[7].ADDR 0x870 Start address of region to protect. The start address must be word-aligned. ACL[7].SIZE 0x874 Size of region to protect counting from address ACL[7].ADDR. Write '0' as no effect. ACL[7].PERM 0x878 Access permissions for region 7 as defined by start address ACL[7].ADDR and size ACL[7].SIZE 4463_156 v1.0 95 |
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