NRF52820-QDAA-R datasheet(16/437 Pages) NORDIC

16 / 437 page

Core components

See AHB multilayer on page 39 and EasyDMA on page 37 for more information about the AHB

multilayer interconnect and EasyDMA.

The same physical RAM is mapped to both the Data RAM region and the Code RAM region. It is up to the

application to partition the RAM within these regions so that one does not corrupt the other.

4.2.1 RAM - Random access memory

The RAM interface is divided into four RAM AHB slaves.

RAM AHB slaves 0 to 3 are connected to two 4 kB RAM sections each, as shown in Memory layout on page

15.

Each RAM section has separate power control for System ON and System OFF mode operation, which is

configured via RAM register (see the POWER — Power supply on page 49).

4.2.2 Flash - Non-volatile memory

The CPU can read from flash memory an unlimited number of times, but is restricted in how it writes to

flash and the number of writes and erases it can perform.

Writing to flash memory is managed by the non-volatile memory controller (NVMC), see NVMC — Non-

volatile memory controller on page 19.

Flash memory is divided into 64 pages of 4 kB each that can be accessed by the CPU via the ICODE and

DCODE buses as shown in Memory layout on page 15.

4.2.3 Memory map

The complete memory map for the nRF52820 is shown in the following figure. As described in Memory on

page 15, Code RAM and Data RAM are the same physical RAM.

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NRF52820-QDAA-R Datasheet(PDF) 16 Page - Nordic Semiconductor