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STLC5460 Datasheet(PDF) 15 Page - STMicroelectronics

No. de pieza STLC5460
Descripción Electrónicos  LINE CARD INTERFACE CONTROLLER
PDF  54 Pages
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Fabricante Electrónico  STMICROELECTRONICS [STMicroelectronics]
Página de inicio  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STLC5460 Datasheet(HTML) 15 Page - STMicroelectronics

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TS and PCMn
at 4 Mb/s
with n = 0 or 2
TS0
TS1
TS2
TS3
TS30
TS31
TS32
TS62
TS63
TSNB = 1
TS at
2Mb/s
TS0
TS0
TS1
TS1
TS15
TS15
TS16
TS31
TS31
PCM at
2Mb/s
PCMn
PCMn+1
PCMn
PCMn+1
PCMn
PCMn+1
PCMn
PCMn
PCMn+1
TSNB = 0
TS at
2Mb/s
TS0
TS1
TS2
TS3
TS30
TS31
TS0
TS30
TS31
PCM at
2Mb/s
PCMn
PCMn+1
TS and PCM0
at 8 Mb/s
TS0
TS1
TS2
TS3
TS4
TS124
TS32
TS62
TS63
TSNB = 1
TS at
2Mb/s
TS0
TS0
TS0
TS0
TS1
TS31
TS31
TS31
TS31
PCM at
2Mb/s
PCM0
PCM1
PCM2
PCM3
PCM0
PCM0
PCM1
PCM2
PCM3
TS and PCM
at 8Mb/s
TS0 to TS31
TS32 to TS63
TS64 to TS95
TS96 to TS127
TSNB = 0
TS at
2Mb/s
TS0 to TS31
TS0 to TS31
TS0 to TS31
TS0 to TS31
PCM at
2Mb/s
PCM0
PCM1
PCM2
PCM3
COMPLEMENTARY PCM OFFSET REGISTER (CPOF)
7
0
PMD1
PMD0
TIM1
TIM0
OOF1
IOF0
IOF1
IOF0
After Reset 00 (H)
PMD1/0 PCM Mode
PMD1
PMD0
The PCM are at
0
0
2048 kbit/s
0
1
4096 kbit/s
1
0
8192 kbit/s
1
1
Not used.
TIM 1/0 these bits are taken into account only if bit TIM of COMP register is at 1; in this case an inter-
rupt is generated periodically and TIM 1/0 defines the period
TIM1
TIM0
Period
0
0
1ms
0
1
8ms
1
0
64ms
1
1
250ms
OOF1/0
Output Offset 1/0.
These two bits are associated with OOF2/9 ofOPOF Register.
IOF1/0
Input Offset 1/0.
These two bits are associated with IOF2/9 of IPOF Register.
STLC5460
15/54



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