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STLC5464 Datasheet(PDF) 16 Page - STMicroelectronics

No. de pieza STLC5464
Descripción Electrónicos  MULTI-HDLCWITH n x 64 SWITCHING MATRIX ASSOCIATED
PDF  83 Pages
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Fabricante Electrónico  STMICROELECTRONICS [STMicroelectronics]
Página de inicio  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STLC5464 Datasheet(HTML) 16 Page - STMicroelectronics

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From SMCR Register
CM
(when Read)
LOOP
DATA
MEMORIES
64kb/s and
n x 64kb/s
CONNECTION
MEMORY
Sequence Integrity,
LOOP, PRSA, PRSG,
INS, OTSV
Tx
HDLC
Rx
GCI
S/ P
IMTD
Sequence
Integrity
INS
1
1
A
1
CM
1
PRSG
PSEUDO RANDOM
SEQUENCE
GENERATOR
211 -1
Rec. O.152
PRSG
SGV
PSEUDO RANDOM
SEQUENCE
ANALYZER
211 -1
Rec. O.152
PRSA
SAV
GCIR
BIT SYNCHRO
Tx
GCI
ME
P/ S
Rx
HDLC
D4/5
D7
D0/7
1
1
DD
1
CMDR
Data
Register
CMAR
Address
Register
SFDR
Sequence Fault
Counter Register
HDLCM
1
D7
DIN’ 0/7
D4/5
BIT SYNCHRO
DIN 0/7
DOUT 0/7
Internal
Bus
From OMCR Register
OMV (per multiplex)
From Connection Memory
OTSV (per channel)
From Disable Pin
(for all multiplexes)
PRSG : Pseudo Random Sequence Generator
PRSA : Pseudo Random Sequence Analyzer
OTSV : Output Time Slot Validated
INS : Insert
ME : Message Enable
IMTD : Increased Min Throughtput Delay
SGV : Sequence Generator Validated
SAV : Sequence Analyzer Validated
CM : Connection Memory (from CMAR Register)
From Connection
Memory
Figure 2 : Switching Matrix Data Path
III - FUNCTIONAL DESCRIPTION (continued)
STLC5464
16/83



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