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ADRF6655ACPZ-R7 Datasheet(PDF) 27 Page - Analog Devices

No. de pieza ADRF6655ACPZ-R7
Descripción Electrónicos  Broadband Up/Downconverting Mixer with Integrated Fractional-N PLL and VCO
PDF  44 Pages
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ADRF6655ACPZ-R7 Datasheet(HTML) 27 Page - Analog Devices

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ADRF6655
Rev. 0 | Page 27 of 44
REGISTER 1—MODULUS DIVIDE CONTROL
With R1[2:0] set to 001, the on-chip modulus divide control
register is programmed as shown in Figure 71.
The MOD value is the preset fractional modulus ranging from
1 to 2047.
REGISTER 2—FRACTIONAL DIVIDE CONTROL
With R2[2:0] set to 010, the on-chip fractional divide control
register is programmed as shown in Figure 72.
The FRAC value is the preset fractional modulus ranging from
0 to MOD − 1.
MODULUS DIVIDE RATIO
DB23
DB22
DB21
DB20
DB19
DB18
DB17
DB16
DB15
DB14
DB13
DB12
DB11
DB10
DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
0
0
0
0
0
0
0
0
0
0
MD10
MD9
MD8
MD7
MD6
MD5
MD4
MD3
MD2
MD1
MD0
C3(0)
C2(0)
C1(1)
MD10
MD9
MD8
MD7
MD6
MD5
MD4
MD3
MD2
MD1
MD0
0
000
0000001
0
000
0000010
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
0
000
1100000
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
1
111
1111111
MODULUS VALUE
...
...
2047
CONTROL BITS
1
1536
2
...
...
RESERVED
Figure 71. Modulus Divide Control Register (R1)
FD10
FD9FD8FD7FD6FD5FD4FD3FD2FD1
FD0
0
000000000
0
0
000000000
1
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
0
110000000
0
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
FRACTIONAL VALUE MUST BE LESS THAN MODULUS
FRACTIONAL VALUE
0
1
...
...
768
...
...
<MDR
FRACTIONAL DIVIDE VALUE
RESERVED
DB23
DB22
DB21
DB20
DB19
DB18
DB17
DB16
DB15
DB14
DB13
DB12
DB11
DB10
DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
CONTROL BITS
00
00000000
FD10
FD9
FD8
FD7
FD6
FD5
FD4
FD3
FD2
FD1
FD0
C3(0)
C2(1)
C1(0)
Figure 72. Fractional Divide Control Register (R2)



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