ADRF6655ACPZ-R7 datasheet(25/44 Pages) AD

25 / 44 page

ADRF6655

Rev. 0 | Page 25 of 44

DEVICE PROGRAMMING

The device is programmed through a 3-pin SPI port. The timing

requirements for the SPI port are described in Figure 2. There

are eight programmable registers, each with 24 bits, controlling

the operation of the device. The register functions can be broken

down as follows:

• Register 0—integer divide control

• Register 1—modulus divide control

• Register 2—fractional divide control

• Register 3—Σ-Δ modulator dither control

• Register 4—charge pump, PFD, and reference path control

• Register 5—LO path and mixer control

• Register 6—VCO controls and PLL enables

• Register 7—external VCO control

Note that the PLL has internal calibration that must run

whenever the device is programmed with a given frequency.

This calibration is automatically run whenever Register 0,

from Analog Devices that allows easy programming from an

external PC. See the ADRF6655 Control Software section for

additional details.

INITIALIZATION SEQUENCE

To ensure proper power-up of the ADRF6655, it is important to

reset the PLL circuitry after the supply rail (VCC1, VCC2, VCCLO,

VCCV2I, and VCCMIX) has settled to 5 V ± 0.25 V. Resetting

the PLL ensures that the internal bias cells are properly configured

even under poor supply start-up conditions. To ensure that the

PLL is reset after power-up, the PLEN data bit (DB6) in Register

5 should be programmed to disable the PLL (PLEN = 0). After a

delay of >100 ms, Register 5 should be programmed to enable

the PLL (PLEN = 1). After this procedure, the registers should

be programmed as follows:

Delay >1 ms

When programming the frequency of the ADRF6655, normally

only Register 2, Register 1, and Register 0 are programmed. When

programming these registers, a short delay of >500 μs should be

placed before programming the last register in the sequence

(Register 0). This ensures that the VCO band calibration initiated

by the first two register writes has sufficient time to complete

before the final band calibration (for Register 0) is initiated.

ADRF6655ACPZ-R7 Datasheet(PDF) 25 Page - Analog Devices