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ADRF6655ACPZ-R7 Datasheet(PDF) 7 Page - Analog Devices

No. de pieza ADRF6655ACPZ-R7
Descripción Electrónicos  Broadband Up/Downconverting Mixer with Integrated Fractional-N PLL and VCO
PDF  44 Pages
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Fabricante Electrónico  AD [Analog Devices]
Página de inicio  http://www.analog.com
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ADRF6655ACPZ-R7 Datasheet(HTML) 7 Page - Analog Devices

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ADRF6655
Rev. 0 | Page 7 of 44
PIN CONFIGURATION AND FUNCTION DESPCRIPTIONS
VCO
LDO
3.3V
LDO
PD +
CHARGE
PUMP
SERIAL
PORT
PROGRAMMABLE
DIVIDER
PRESCALER
MODULUS
INTEGER
FRACTION
VCO
BAND
AND
CURRENT
CAL/SET
PFD
2.5V
LDO
÷2 OR ÷3
÷2 OR ÷4
×2
NC = NO CONNECT
1
VCC1
2
DECL1
3
CP
4
GND
5
RSET
6
REFIN
7
GND
8
MUXOUT
9
DECL2
10
VCC2
23 GND
24 GND
25 INN
26 INP
27 VCCMIX
28 GND
29 IP3SET
30 GND
22 VCCV2I
21 GND
ADRF6655
WIDEBAND
UP/DOWN
CONVERTER
MUX
MUX
ENABLE
VCO
CORE
6
6
THIRD-ORDER
SDM
Figure 3. Pin Configuration
Table 4. Pin Function Descriptions
Pin No.
Mnemonic
Description
1
VCC1
Power Supply for Internal 3.3 V LDO. The power supply voltage range is 4.75 V to 5.25 V. Supply pin should
be decoupled with 100 pF and 0.1 μF capacitors located close to the pin.
2
DECL1
Decoupling Node for 3.3 V LDO. Pin should be decoupled with 100 pF, 0.1 μF, and 10 μF capacitors
located close to the pin.
3
CP
Charge Pump Output Pin. Connect this pin to VTUNE through the loop filter.
4, 7, 11, 15,
20, 21, 23,
24, 28, 30,
31, 35, 36
GND
Ground. Connect these pins to a low impedance ground plane.



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