AD623

Rev. D | Page 18 of 24

The circuit in Figure 45 should be built using a PC board with a

ground plane on both sides. All component leads should be as

short as possible. Resistors R1 and R2 can be common 1% metal

film units, but Capacitors C1 and C2 need to be ±5% tolerance

devices to avoid degrading the circuit’s common-mode rejection.

Either the traditional 5% silver mica units or Panasonic ±2%

PPS film capacitors are recommended.

In many applications, shielded cables are used to minimize

noise; for best CMR over frequency, the shield should be properly

driven. Figure 46 shows an active guard driver that is configured

to improve ac common-mode rejection by bootstrapping the

capacitances of input cable shields, thus minimizing the capacitance

mismatch between the inputs.

AD623

OUTPUT

REF

2

1

8

3

6

5

7

4

2

2

AD8031

100Ω

–IN

+IN

Figure 46. Common-Mode Shield Driver

GROUNDING

Because the AD623 output voltage is developed with respect to

the potential on the reference terminal, many grounding problems

can be solved by simply tying the REF pin to the appropriate local

ground. The REF pin should, however, be tied to a low impedance

point for optimal CMR.

The use of ground planes is recommended to minimize the

impedance of ground returns (and hence the size of dc errors).

To isolate low level analog signals from a noisy digital environment,

many data acquisition components have separate analog and

digital ground returns (see Figure 47). All ground pins from

mixed signal components, such as analog-to-digital converters

(ADCs), should be returned through the high quality analog

ground plane. Maximum isolation between analog and digital is

achieved by connecting the ground planes back at the supplies.

The digital return currents from the ADC that flow in the analog

ground plane, in general, have a negligible effect on noise

performance.

If there is only a single power supply available, it must be shared

by both digital and analog circuitry. Figure 48 shows how to

minimize interference between the digital and analog circuitry.

As in the previous case, separate analog and digital ground planes

should be used (reasonably thick traces can be used as an

alternative to a digital ground plane). These ground planes

should be connected at the ground pin of the power supply.

Separate traces should be run from the power supply to the

supply pins of the digital and analog circuits. Ideally, each device

should have its own power supply trace, but these can be shared

by a number of devices, as long as a single trace is not used to

route current to both digital and analog circuitry.

AGND

MICROPROCESSOR

AD623

2

3

6

5

7

4

ANALOG POWER SUPPLY

GND

–5V

+5V

DIGITAL POWER SUPPLY

+5V

GND

4

1

6

AGND

14

DGND

3

ADC

AD7892-2

0.1µF

0.1µF

0.1µF 0.1µF

12

Figure 47. Optimal Grounding Practice for a Bipolar Supply Environment with Separate Analog and Digital Supplies

AGND

MICROPROCESSOR

AD623

2

3

6

5

7

4

4

1

6

AGND

14

DGND

ADC

AD7892-2

0.1µF

0.1µF

0.1µF

12

POWER SUPPLY

+5V

GND

Figure 48. Optimal Ground Practice in a Single Supply Environment