| Motor de Búsqueda de Datasheet de Componentes Electrónicos |
|
AD7011 Datasheet(PDF) 3 Page - Analog Devices |
|
|
|||||||||||||||||||||||||||||
AD7011 Datasheet(HTML) 3 Page - Analog Devices |
|
3 / 12 page ![]() AD7011 REV. B –3– 20k 20k 20pF 20pF AD7011 ITx/QTx ITx / QTx 40k Ω Ω Ω Figure 1. Analog Output Test Load Circuit MASTER CLOCK TIMING Parameter Limit at TA = –40 C to +85 C Units Description t1 300 ns min MCLK Cycle Time t2 100 ns min MCLK High Time t3 100 ns min MCLK Low Time (VAA = VDD = +5 V 10%; AGND = DGND = 0 V. All specifications are TMIN to TMAX unless otherwise noted.) TO OUTPUT PIN +2.1V I OH C L 100pF 1.6mA 200µA I OL Figure 3. Load Circuit for Digital Outputs MCLK t 2 t 1 t 3 Figure 2. Master Clock (MCLK) Timing |
|
|
Enlace URL |
| ¿ALLDATASHEET es útil para Ud.? [ DONATE ] |
Todo acerca de Alldatasheet | Publicidad | Contáctenos | Política de Privacidad | Enlace a la hoja de datos | Intercambio de Enlaces | Lista de Fabricantes All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |