Z8FS021 datasheet(64/68 Pages) ZILOG

64 / 68 page

PS028806-0315

Appendix B. PIR Engine Initialization and Control

ZMOTION® Intrusion Detection

Product Specification

Appendix B. PIR Engine Initialization and Control

The application software must execute an initialization procedure to enable the PIR

Engine. Once the PIR Engine is enabled, it runs in the background from the ADC inter-

rupt. Every ADC conversion generates an interrupt and the PIR Engine performs its func-

tions during this time. The user application code runs in the foreground and monitors the

status through the API and performs any other functions required for the application.

The PIR Engine also requires a one-second tick to perform several house-keeping opera-

tions and to keep track of its sampling rate. This one-second time base must be provided

by the user application through Status/Control Register 1 (Engine Timer Tick). This bit

should be set to 1 at the rate of once per second by the application software to provide the

Engine with a one-second time base. The accuracy of this timing is not critical, but should

be within +/– 10%.

There are two basic modes in which the PIR Engine operates: Normal Scan Rate mode and

Low Scan Rate mode. See the description of the PIR Scan Rate bit in the PIR Status/Con-

trol Register 1 on page 29 for more details.

The PIR Engine runs in the background from the ADC interrupt (initiated by the applica-

tion). Engine processing is done during the ADC interrupt. Therefore, CPU loading is

based on the sample rate of the ADC. To ensure a consistent sample rate, the Engine must

know the MCU operating (system clock) frequency. It uses the Flash Frequency Control

Registers to determine the operating frequency, which must be initialized prior to starting

the Engine.

The Flash Frequency High (FFREQH) and Flash Frequency Low Byte (FFREQL) regis-

ters combine to form a 16-bit value FFREQ primarily to control timing for Flash program

and erase functions. This value is also used by the PIR Software Engine to calculate the

required sample rate of the ADC and other functions. The 16-bit value for FFREQ is the

System Clock Frequency in KHz and is calculated using the following equation:

FFREQ[15:0] = {FFREQH[7:0],FFREQL[7:0]} = (System Clock Frequency)/1000

The process for initializing the PIR Engine is common to both Normal Scan Rate and Low

Scan Rate modes. The sequence goes as follows:

1. Set up the API control registers (standard and advanced).

2. Initialize the FFREQH and FFREQL registers with the MCU clock frequency.

3. Write the PIR Enable Pattern to the PIR Enable Register.

4. Call the PIR Init.

5. Initialize any application-specific I/Os and peripherals.

6. Enable interrupts.

7. Ensure that the PIR Sensor Stable bit (PIR_SC0:0) is set.

8. Continue with the application.

Z8FS021 Datasheet(PDF) 64 Page - Zilog, Inc.