WM8803CDTSLASHV datasheet(8/45 Pages) WOLFSON

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WM8803

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PP Rev 1.1 September 2003

Test Conditions

Ta = 25°C, AVDD = DVDD = 3.3V, AGND = DGND = 0V

PARAMETER

SYMBOL

TEST CONDITIONS

MIN

TYP

MAX

UNIT

CLKOUT to BCLK delay

tMBO

—

BCLK to SDATO delay

tBDO

—

____

UGPI low-level pulse width

tTKT

—

100

Notes:

1. When setting the clock switching transition period signal output

MICRO-CONTROLLER INTERFACE TIMING REQUIREMENTS

Test Conditions

Ta = -30~70°C, AVDD = DVDD = 3.3V, AGND = DGND = 0V

PARAMETER

SYMBOL

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Micro-controller Interface Timing Information

PD low-level pulse width

TPDdw

200

—

µs

E/INT high-level pulse width

TINTuw

1/fs

µs

CL low-level pulse width

TCLdw

100

—

CL high-level pulse width

TCLuw

100

—

CL to CE setup time

tCEsetup

—

CL to CE hold time

TCEhold

—

CL to DI setup time

TDIsetup

—

CL to DI hold time

TDIhold

—

CL to CE hold time

TCLhold

—

CL to DO delay time

tCLtoDO

—

CE to DO delay time

tCEtoDO

—

Notes:

1. INTOPF = “1”, INTSEL = “1”, and fs is the input sampling frequency.

CLuw

INTuw

CEtoDO

CLtoDO

E/INT

CLdw

DIsetup

DIhold

CEsetup

CEhold

CLhold

Hi-Z

Figure 2 Micro-controller Interface Timing Requirements

WM8803CDT/V Datasheet(PDF) 8 Page - Wolfson Microelectronics plc

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