LTM4650 datasheet(75/138 Pages) AD

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LTM4664A

Rev. 0

For more information www.analog.com

When the part receives a new command while it is busy,

it will communicate this condition using standard PMBus

protocol. Depending on part configuration it may either

NACK the command or return all ones (0xFF) for reads.

It may also generate a BUSY fault and ALERT notifica-

tion, or stretch the SCL clock low. For more information

refer to PMBus Specification v1.1, Part II, Section 10.8.7

and SMBus v2.0 section 4.3.3. Clock stretching can be

enabled by asserting bit 1 of MFR_CONFIG_ ALL. Clock

stretching will only occur if enabled and the bus commu-

nication speed exceeds 100kHz.

// wait until chip is not busy

{

mfrCommonValue = PMBUS_READ_BYTE(0xEF);

partReady = (mfrCommonValue & 0x68) == 0x68;

}while(!partReady)

// now the part is ready to receive the next

command

PMBUS_WRITE_WORD(0x21, 0x2000); //write VOUT_

COMMAND to 2V

Figure 37. Example of a Command Write of VOUT_COMMAND

PMBus busy protocols are well accepted standards, but

can make writing system level software somewhat com-

plex. The part provides three ‘hand shaking’ status bits

which reduce complexity while enabling robust system

level communication.

The three hand shaking status bits are in the MFR_

COMMON register. When the part is busy executing an

internal operation, it will clear bit 6 of MFR_COMMON

(‘chip not busy’). When the part is busy specifically

because it is in a transitional VOUT state (margining hi/lo,

power off/on, moving to a new output voltage set point,

etc.) it will clear bit 4 of MFR_COMMON (‘output not in

transition’). When internal calculations are in process, the

part will clear bit 5 of MFR_COMMON (‘calculations not

pending’). These three status bits can be polled with a

PMBus read byte of the MFR_COMMON register until all

three bits are set. A command immediately following the

status bits being set will be accepted without NACKing or

generating a BUSY fault/ALERT notification. The part can

NACK commands for other reasons, however, as required

by the PMBus spec (for instance, an invalid command or

data). An example of a robust command write algorithm

for the VOUT_COMMAND register is provided in Figure 33.

It is recommended that all command writes (write byte,

write word, etc.) be preceded with a polling loop to avoid

the extra complexity of dealing with busy behavior and

unwanted ALERT notification. A simple way to achieve this

is to create a SAFE_WRITE_BYTE() and SAFE_WRITE_

WORD() subroutine. The above polling mechanism allows

your software to remain clean and simple while robustly

communicating with the part. For a detailed discussion

of these topics and other special cases please refer to the

Analog Devices Application Notes.

When communicating using bus speeds at or below

100kHz, the polling mechanism shown here provides a

simple solution that ensures robust communication with-

out clock stretching. At bus speeds in excess of 100kHz,

it is strongly recommended that the part be configured to

enable clock stretching. This requires a PMBus master that

supports clock stretching. System software that detects

and properly recovers from the standard PMBus NACK/

BUSY faults as described in the PMBus Specification v1.1,

Par II, Section 10.8.7 is required to communicate The

LTM4664A PSM is not recommended in applications with

bus speeds in excess of 400kHz.

THERMAL CONSIDERATIONS AND

OUTPUT CURRENT DERATING

The thermal resistances reported in the Pin Configuration

section of this data sheet are consistent with those

parameters defined by JESD51-12 and are intended for

use with finite element analysis (FEA) software model-

ing tools that leverage the outcome of thermal modeling,

simulation, and correlation to hardware evaluation per-

formed on a µModule package mounted to a hardware

test board defined by JESD51-9 (“Test Boards for Area

Array Surface Mount Package Thermal Measurements”).

The motivation for providing these thermal coefficients is

found in JESD51-12 (“Guidelines for Reporting and Using

Electronic Package Thermal Information”).

Many designers may opt to use laboratory equipment

and a test vehicle such as the demo board to predict the

µModule regulator’s thermal performance in their appli-

cation at various electrical and environmental operating

conditions to compliment any FEA activities. Without

FEA software, the thermal resistances reported in the

DUAL 25A/30A PSM APPLICATIONS INFORMATION

LTM4650 Datasheet(PDF) 75 Page - Analog Devices

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