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AD9380/PCB Datasheet(PDF) 3 Page - Analog Devices

No. de pieza AD9380/PCB
Descripción Electrónicos  Analog/HDMI Dual-Display Interface
PDF  60 Pages
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Fabricante Electrónico  AD [Analog Devices]
Página de inicio  http://www.analog.com
Logo AD - Analog Devices

AD9380/PCB Datasheet(HTML) 3 Page - Analog Devices

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AD9380
Rev. 0 | Page 3 of 60
SPECIFICATIONS
ANALOG INTERFACE ELECTRICAL CHARACTERISTICS
VDD, VD = 3.3 V, DVDD = PVDD = 1.8 V, ADC clock = maximum.
Table 1.
AD9380KSTZ-100
AD9380KSTZ-150
Parameter
Temp
Test Level
Min
Typ
Max
Min
Typ
Max
Unit
RESOLUTION
8
8
Bits
DC ACCURACY
Differential Nonlinearity
25°C
I
−0.6
+1.6/−1.0
±0.7
+1.8/−1.0
LSB
Integral Nonlinearity
25°C
I
±1.0
±2.1
±1.1
±2.25
LSB
No Missing Codes
Full
I
Guaranteed
Guaranteed
VDD
ANALOG INPUT
Input Voltage Range
Minimum
Full
VI
0.5
0.5
V p–p
Maximum
Full
VI
1.0
1.0
V p–p
Gain Tempco
25°C
V
100
220
ppm/°C
Input Bias Current
25°C
V
0.2
1
μA
Input Full-Scale Matching
25°C
Full
VI
VI
1.25
1.50
5
7
1.25
1.50
5
7
%FS
%FS
Offset Adjustment Range
Full
V
50
50
%FS
SWITCHING PERFORMANCE1
Maximum Conversion Rate
Full
VI
100
150
MSPS
Minimum Conversion Rate
Full
VI
10
10
MSPS
Data-to-Clock Skew
Full
IV
−0.5
+2.0
−0.5
+2.0
ns
SERIAL PORT TIMING
tBUFF
Full
VI
4.7
4.7
μs
tSTAH
Full
VI
4.0
4.0
μs
tDHO
Full
VI
0
0
μs
tDAL
Full
VI
4.7
4.7
μs
tDAH
Full
VI
4.0
4.0
μs
tDSU
Full
VI
250
250
ns
tSTASU
Full
VI
4.7
4.7
μs
tSTOSU
Full
VI
4.0
4.0
μs
HSYNC Input Frequency
Full
VI
15
110
15
110
kHz
Maximum PLL Clock Rate
Full
VI
100
150
MHz
Minimum PLL Clock Rate
Full
IV
12
12
MHz
PLL Jitter
25°C
IV
700
700
ps p-p
Sampling Phase Tempco
Full
IV
15
15
ps/°C
DIGITAL INPUTS, 5 V TOLERANT
Input Voltage, High (VIH)
Full
VI
2.6
2.6
V
Input Voltage, Low (VIL)
Full
VI
0.8
0.8
V
Input Current, High (IIH)
Full
V
−82
−82
μA
Input Current, Low (IIL)
Full
V
82
82
μA
Input Capacitance
25°C
V
3
3
pF
DIGITAL OUTPUTS
Output Voltage, High (VOH)
Full
VI
VDD − 0.1
VDD − 0.1
V
Output Voltage, Low (VOL)
Full
VI
0.4
0.4
V
Duty Cycle, DATACK
Full
V
45
50
55
45
50
55
%
Output Coding
Binary
Binary



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