AD9380SLASHPCB datasheet(21/60 Pages) AD

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AD9380

Rev. 0 | Page 21 of 60

Color Space Conversion (CSC) Matrix

The CSC matrix in the AD9380 consists of three identical

processing channels. In each channel, three input values are

multiplied by three separate coefficients. Also included are an

offset value for each row of the matrix and a scaling multiple

for all values. Each value has a 13-bit, twos complement

resolution to ensure the signal integrity is maintained. The

CSC is designed to run at speeds up to 150 MHz, supporting

resolutions up to 1080p at 60 Hz. With any-to-any color space

support, formats such as RGB, YUV, YCbCr, and others are

supported by the CSC.

The main inputs, RIN, GIN, and BIN come from the 8- to 12-bit

inputs from each channel. These inputs are based on the input

format detailed in Table 11 The mapping of these inputs to the

CSC inputs is shown in Table 10.

Table 10. CSC Port Mapping

Input Channel

CSC Input Channel

R/CR

RIN

Gr/Y

GIN

B/CB

One of the three channels is represented in Figure 13. In each

processing channel, the three inputs are multiplied by three

separate coefficients marked a1, a2, and a3. These coefficients

are divided by 4096 to obtain nominal values ranging from

–0.9998 to +0.9998. The variable labeled a4 is used as an offset

control. The CSC_Mode setting is the same for all three

processing channels. This multiplies all coefficients and offsets

by a factor of 2CSC_Mode.

The functional diagram for a single channel of the CSC, as

shown in Figure 13, is repeated for the remaining G and B

channels. The coefficients for these channels are b1, b2, b3, b4,

c1, c2, c3, and c4.

×2

a1[12:0]

a2[12:0]

a3[12:0]

RIN [11:0]

BIN [11:0]

GIN [11:0]

×4

CSC_Mode[1:0]

a4[12:0]

ROUT [11:0]

4096

Figure 13. Single CSC Channel

A programming example and register settings for several

common conversions are listed in the Color Space Converter

(CSC) Common Settings section.

For a detailed functional description and more programming

examples, refer to Application Note AN-795, AD9880 Color

Space Converter User's Guide.

AUDIO PLL SETUP

Data contained in the audio infoframes, among other registers,

define for the AD9380 HDMI receiver not only the type of

audio, but the sample frequency. It also contains information

about the N and CTS values used to re-create the clock. With

this information, it is possible to regenerate the audio sampling

frequency. The audio clock is regenerated by dividing the 20-bit

CTS value into the TMDS clock, then multiplying by the 20-bit

N value. This yields a multiple of the sampling frequency (fS) of

either 128 × fS or 256 × fS. It is possible for this to be specified

up to 1024 × fS.

SINK DEVICE

SOURCE DEVICE

1N AND CTS VALUES ARE TRANSMITTED USING THE

AUDIO CLOCK REGENERATION PACKET. VIDEO

CLOCK IS TRANSMITTED ON TMDS CLOCK CHANNEL.

128 ×

VIDEO

CLOCK

128

× f

TMDS

CLOCK

CTS1

DIVIDE

CYCLE

TIME

COUNTER

DIVIDE

CTS

MULTIPLY

Figure 14. N and CTS for Audio Clock

AUDIO BOARD LEVEL MUTING

The audio can be muted through the infoframes or locally

via the serial bus registers. Muting can be controlled with

AVI Infoframes

The HDMI TMDS transmission contains infoframes with

specific information for the monitor such as:

•

Audio information

2 to 8 channels of audio identified

Audio coding

Audio sampling frequency

•

Speaker placement

•

N and CTS values (for reconstruction of the audio)

•

Muting

•

Source information

SACD

DVD

•

Video information

Video ID Code (per CEA861B)

Color space

Aspect ratio

Horizontal and vertical bar information

MPEG frame information (I, B, or P frame)

•

Vendor (transmitter source) name and product model

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