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AD9380/PCB Datasheet(PDF) 47 Page - Analog Devices |
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AD9380/PCB Datasheet(HTML) 47 Page - Analog Devices |
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47 / 60 page ![]() AD9380 Rev. 0 | Page 47 of 60 0x58—Bits[6:4] MCLK PLL_N These bits control the division of the MCLK out of the PLL. Table 24. PLL_N [2:0] MCLK Divide Value 0 /1 1 /2 2 /3 3 /4 4 /5 5 /6 6 /7 7 /8 0x58—Bit[3] N_CTS_Disable This bit makes it possible to prevent the N/CTS packet on the link from writing to the N and CTS registers. 0x58—Bit[2:0] MCLK fs_N These bits control the multiple of 128 fS used for MCLK out. Table 25. MCLK fs_N [2:0] fS Multiple 0 128 1 256 2 384 3 512 4 640 5 768 6 896 7 1024 0x59—Bit[6] MDA/MCL PU Disable This bit disables the inter MDA/MCL pull-ups. 0x59—Bit[5] CLK Term O/R This bit allows for overriding during power down. 0 = auto, 1 = manual. 0x59—Bit[4] Manual CLK Term This bit allows normal clock termination or disconnects it. 0 = normal, 1 = disconnected. 0x59—Bit[2] FIFO Reset UF This bit resets the audio FIFO if underflow is detected. 0x59—Bit[1] FIFO Reset OF This bit resets the audio FIFO if overflow is detected. 0x59—Bit[0] MDA/MCL Three-State This bit three-states the MDA/MCL lines to allow in-circuit programming of the EEPROM. 0x5A—Bit[6:0] Packet Detect This register indicates if a data packet in specific sections has been detected. These seven bits are updated if any specific packet has been received since last reset or loss of clock detect. Normal is 0x00. Table 26. Packet Detect Bit Packet Detected 0 AVI infoframe 1 Audio infoframe 2 SPD infoframe 3 MPEG source infoframe 4 ACP packets 5 ISRC1 packets 6 ISRC2 packets 0x5B—Bit[3] HDMI Mode 0 = DVI, 1 = HDMI. 0x5E—Bits[7:6] Channel Status Mode 0x5E—Bits[5:3] PCM Audio Data 0x5E—Bit[2] Copyright Information 0x5E—Bit[1] Linear PCM Identification 0x5E—Bit[0] Use of Channel Status Block 0x5F—Bits[7:0] Channel Status Category Code 0x60—Bits[7:4] Channel Number 0x60—Bits[3:0] Source Number 0x61—Bits[5:4] Clock Accuracy 0x61—Bits[3:0] Sampling Frequency Table 27. Code Frequency (kHz) 0x0 44.1 0x2 48 0x3 32 0x8 88.2 0xA 96 0xC 176.4 0xE 192 0x62—Bits[3:0] Word Length 0x7B—Bits[7:0] CTS (Cycle Time Stamp) (19:12) These are the most significant 8 bits of a 20-bit word used in the 20-bit N term in the regeneration of the audio clock. 0x7C—Bits[7:0] CTS (11:4) 0x7D—Bits[7:4] CTS (3:0) 0x7D—Bits[3:0] N (19:16) These are the most significant 4 bits of a 20-bit word used along with the 20-bit CTS term to regenerate the audio clock. 0x80—Bits[AVI] Infoframe Version |
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