AD9380SLASHPCB datasheet(30/60 Pages) AD

30 / 60 page

AD9380

Rev. 0 | Page 30 of 60

Hex

Address

Read/Write

or Read-Only

Bits

Default

Value

Description

0x56

Read/Write

[7:0]

00001111

Test

Must be written to 0x0F for proper operation.

0x57

Read/Write

[7]

0*******

A/V Mute Override

A1 overrides the AV mute value with Bit 6.

[6]

*0******

AV Mute Value

Sets AV mute value if override is enabled.

[3]

****0***

Disable Video Mute

Disables mute of video during AV mute.

[2]

*****0**

Disable Audio Mute

Disables mute of audio during AV mute.

0x58

Read/Write

[7]

MCLK PLL Enable

MCLK PLL enable—uses analog PLL.

[6:4]

MCLK PLL_N

MCLK PLL N [2:0]—this controls the division of the MCLK out of

the PLL: 0 = /1, 1 = /2, 2 = /3, 3 = /4, etc.

[3]

N_CTS_Disable

Prevents the N/CTS packet on the link from writing to the N and

CTS registers.

[2:0]

MCLK FS_N

Controls the multiple of 128 fS used for MCLK out. 0 = 128 fS,

1 = 256 fS, 2 = 384, 7 = 1024 fS.

0x59

Read/Write

[6]

MDA/MCL PU

This disables the MDA/MCL pull-ups.

[5]

CLK Term O/R

Clock termination power-down override: 0 = auto, 1 = manual.

[4]

Manual CLK Term

Clock termination: 0 = normal, 1 = disconnected.

[2]

FIFO Reset UF

This bit resets the audio FIFO if underflow is detected.

[1]

FIFO Reset OF

This bit resets the audio FIFO if overflow is detected.

[0]

MDA/MCL Three-

State

This bit three-states the MDA/MCL lines.

0x5A

Read

[6:0]

Packet Detected

These 7 bits are updated if any specific packet has been received

since last reset or loss of clock detect. Normal is 0x00.

Bit

Data Packet Detected

AVI infoframe.

Audio infoframe.

SPD infoframe.

MPEG source infoframe.

ACP packets.

ISRC1 packets.

ISRC2 packets.

0x5B

Read

[3]

HDMI Mode

0 = DVI, 1 = HDMI.

0x5E

Read

[7:6]

Channel Status

Mode = 00. All others are reserved.

[5:3]

When Bit 1 = 0 (Linear PCM).

000 = 2 audio channels without pre-emphasis.

001 = 2 audio channels with 50/15 μs pre-emphasis.

010 = reserved.

011 = reserved.

0 = software for which copyright is asserted.

1 = software for which no copyright is asserted.

0 = audio sample word represents linear PCM samples.

1 = audio sample word used for other purposes.

0 = consumer use of channel status block.

Audio Channel Status

0x5F

Read

[7:0]

Channel Status

Category Code

See CEA 861B for description

0x60

Read

[7:4]

Channel Number

See CEA 861B for description

[3:0]

Source Number

0x61

Read

[5:4]

Clock Accuracy

Clock accuracy.

00 = Level II.

01 = Level III.

10 = Level I.

11 = reserved.

[3:0]

Sampling

0011 = 2 kHz.

Frequency

0000 = 44.1 kHz.

1000 = 88.2 kHz.

AD9380/PCB Datasheet(PDF) 30 Page - Analog Devices

AD9380/PCB Datasheet(HTML) 30 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60

Datasheet Descarga

Enlace URL