UPD17708 datasheet(51/358 Pages) RENESAS

51 / 358 page

µPD17704, 17705, 17707, 17708, 17709

5.5 Bank Register (BANK)

5.5.1 Configuration of bank register

Figure 5-5 shows the configuration of the bank register.

As shown in the figure, the bank register consists of 4 bits of system register address 79H (BANK).

Figure 5-5. Configuration of Bank Register

5.5.2 Function of bank register

The bank register specifies a bank of the data memory.

Table 5-1 shows the relationships between the value of the bank register and a bank of the data memory that

is specified.

Because the bank register is one of the system registers, its contents can be rewritten regardless of the bank

currently specified.

When manipulating a bank register, therefore, the status of the bank at that time is irrelevant.

Table 5-1. Data Memory Bank Specification

Note

Do not set BANKs 6 through 14 in the

µPD17704 and 17705, and BANKs 10 through 14 in the

µPD17707 and 17708 because these banks are not provided.

Caution

The area to which the data memory is allocated differs depending on the model. For details,

refer to Figure 4-2 Configuration of Data Memory.

Address

Name

Symbol

Bit

Data

Clock stop

79H

Bank register

(BANK)

BANK

Retained

Power-ON reset

WDT&SP reset

CE reset

Bank Register

(BANK)

Bank of Data

Memory

BANK0

BANK1

BANK2

BANK3

BANK4

BANK5

BANK6Note

BANK7Note

Bank Register

(BANK)

Bank of Data

Memory

BANK8Note

BANK9Note

BANK10Note

BANK11Note

BANK12Note

BANK13Note

BANK14Note

BANK15

UPD17708 Datasheet(PDF) 51 Page - Renesas Technology Corp

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