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Motor de Búsqueda de Datasheet de Componentes Electrónicos |
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Motor de Búsqueda de Datasheet de Componentes Electrónicos |
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UPD17708 Datasheet(PDF) 76 Page - Renesas Technology Corp |
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UPD17708 Datasheet(HTML) 76 Page - Renesas Technology Corp |
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76 / 358 page  µPD17704, 17705, 17707, 17708, 17709 74 Table 8-1. Peripheral Hardware Control Functions of Control Registers (5/8) Peripheral Control Register Peripheral Hardware Control Function At Reset Clock Hardware Name Address Read/ Function Set value Power- WDT CE Stop Write Symbol ON & SP reset 01 reset reset Interrupt Interrupt edge 1EH R/W IEG4 Sets interrupt issuance edge Rising edge Falling edge 0 0 Retained Retained selection 1 (INT4 pin) INT4SEL Sets interrupt request flag of Enables Disables P1A3/INT4 pin setting of flag setting of flag IEG3 Sets interrupt issuance edge Rising edge Falling edge (INT3 pin) INT3SEL Sets interrupt request flag of Enables Disables P1A2/INT3 pin setting of flag setting of flag Interrupt edge 1FH R/W 0 Fixed to “0” 0 0 Retained Retained selection 2 IEG2 Sets interrupt issuance edge Rising edge Falling edge (INT2 pin) IEG1 Sets interrupt issuance edge (INT1 pin) IEG0 Sets interrupt issuance edge (INT0 pin) Interrupt enable 1 2DH R/W IPSIO1 Enables serial interface 1 Disables Enables 0 0 Retained Retained interrupt interrupt interrupt IPSIO0 Enables serial interface 0 interrupt IPTM3 Enables timer 3 interrupt IPTM2 Enables timer 2 interrupt Interrupt enable 2 2EH R/W IPTM1 Enables timer 1 interrupt Disables Enables 0 0 Retained Retained IPTM0 Enables timer 0 interrupt interrupt interrupt IP4 Enables INT4 pin interrupt IP3 Enables INT3 pin interrupt Interrupt enable 3 2FH R/W IP2 Enables INT2 pin interrupt Disables Enables 0 0 Retained Retained IP1 Enables INT1 pin interrupt interrupt interrupt IP0 Enables INT0 pin interrupt IPCE Enables CE pin interrupt Serial interface 1 34H R/W 0 Fixed to “0” 0 0 Retained Retained interrupt request 0 0 IRQSIO1 Detects serial interface 1 No interrupt Interrupt interrupt request request request b3 b2 b1 b0 |
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