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Motor de Búsqueda de Datasheet de Componentes Electrónicos |
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Motor de Búsqueda de Datasheet de Componentes Electrónicos |
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UPD17708 Datasheet(PDF) 114 Page - Renesas Technology Corp |
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UPD17708 Datasheet(HTML) 114 Page - Renesas Technology Corp |
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114 / 358 page  µPD17704, 17705, 17707, 17708, 17709 112 11.2.7 Status of I/O port at reset (1) At power-ON reset All the I/O ports are set in the input mode. The contents of the output latch are reset to “0”. (2) At WDT&SP reset All the I/O ports are set in the input mode. The contents of the output latch are reset to “0”. (3) At CE reset The setting of the input or output mode is retained. The contents of the output latch are also retained. (4) On execution of clock stop instruction The setting of the input or output mode is retained. The contents of the output latch are also retained. (5) In halt status The previous status is retained. |
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