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UPD17708 Datasheet(PDF) 134 Page - Renesas Technology Corp

No. de pieza UPD17708
Descripción Electrónicos  MOS INTEGRATED CIRCUIT
PDF  358 Pages
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Fabricante Electrónico  RENESAS [Renesas Technology Corp]
Página de inicio  http://www.renesas.com
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UPD17708 Datasheet(HTML) 134 Page - Renesas Technology Corp

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µPD17704, 17705, 17707, 17708, 17709
132
12.2.3 Vector address generator (VAG)
The vector address generator generates a branch address (vector address) of the program memory
corresponding to an interrupt source that has been accepted from the corresponding peripheral hardware.
Table 12-1 shows the vector addresses of the respective interrupt sources.
Table 12-1. Interrupt Sources and Vector Addresses
Interrupt Source
Vector Address
Falling edge of CE pin
00CH
INT0 pin
00BH
INT1 pin
00AH
INT2 pin
009H
INT3 pin
008H
INT4 pin
007H
Timer 0
006H
Timer 1
005H
Timer 2
004H
Timer 3
003H
Serial interface 0
002H
Serial interface 1
001H



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