DSP56303 datasheet(21/292 Pages) FREESCALE

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DMA

DSP56303 User’s Manual, Rev. 2

Freescale Semiconductor

1-11

Note:

See Section 1.6.6, Internal Memory, on page 1-9 for memory size details.

1.8 DMA

The DMA block has the following features:

Six DMA channels supporting internal and external accesses

One-, two-, and three-dimensional transfers (including circular buffering)

End-of-block-transfer interrupts

Triggering from interrupt lines and all peripherals

Figure 1-1. DSP56303 Block Diagram

PLL

OnCE

Clock

Generator

Internal

Data

Bus

Switch

YAB

XAB

PAB

YDB

XDB

PDB

GDB

MODB/IRQB

MODC/IRQC

External

Data Bus

Switch

MODD/IRQD

DSP56300

24-Bit

DDB

DAB

Peripheral

Core

Expansion Area

SCI

Interface

JTAG

RESET

MODA/IRQA

PINIT/NMI

Bootstrap

ROM

EXTAL

XTAL

Address

Control

Data

Triple

Timer

Host

Interface

HI08

ESSI

Interface

Address

Generation

Unit

Six-Channel

DMA Unit

Program

Interrupt

Controller

Program

Decode

Controller

Program

Address

Generator

Data ALU

× 24 + 56 → 56-bit MAC

Two 56-bit Accumulators

56-bit Barrel Shifter

Power

Management

External

Bus

Interface

and

I-Cache

Control

External

Address

Bus

Switch

Memory

Expansion

Area

Program RAM

4096

× 24 bits

(default)

X Data

RAM

2048

× 24

bits

(default)

Y Data

RAM

2048

× 24

bits

(default)

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