DSP56303 datasheet(88/292 Pages) FREESCALE

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DSP56303 User’s Manual, Rev. 2

4-30

Freescale Semiconductor

Core Configuration

18–17

DPR

DMA Channel Priority

Define the DMA channel priority relative to the other DMA channels and to the core priority

if an external bus access is required. For pending DMA transfers, the DMA controller

compares channel priority levels to determine which channel can activate the next word

transfer. This decision is required because all channels use common resources, such as

the DMA address generation logic, buses, and so forth.

DPR

Channel Priority

Priority level 0 (lowest)

Priority level 1

Priority level 2

Priority level 3 (highest)

• If all or some channels have the same priority, then channels are activated in a

round-robin fashion—that is, channel 0 is activated to transfer one word, followed by

channel 1, then channel 2, and so on.

• If channels have different priorities, the highest priority channel executes DMA transfers

and continues for its pending DMA transfers.

• If a lower-priority channel is executing DMA transfers when a higher priority channel

receives a transfer request, the lower-priority channel finishes the current word transfer

and arbitration starts again.

• If some channels with the same priority are active in a round-robin fashion and a new

higher-priority channel receives a transfer request, the higher-priority channel is granted

transfer access after the current word transfer is complete. After the higher-priority

channel transfers are complete, the round-robin transfers continue. The order of transfers

in the round-robin mode may change, but the algorithm remains the same.

• The DPR bits also determine the DMA priority relative to the core priority for external bus

access. Arbitration uses the current active DMA priority, the core priority defined by the

SR bits CP[1–0], and the core-DMA priority defined by the OMR bits CDP[1–0]. Priority of

core accesses to external memory is as follows:

Table 4-11. DMA Control Register (DCR) Bit Definitions (Continued)

Bit

Number

Bit Name

Reset

Value

Description

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