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TPL0102 Datasheet(PDF) 23 Page - Texas Instruments

No. de pieza TPL0102
Descripción Electrónicos  TPL0102 Two 256-Taps Digital Potentiometers With Non-Volatile Memory
PDF  48 Pages
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Fabricante Electrónico  TI2 [Texas Instruments]
Página de inicio  https://www.ti.com
Logo TI2 - Texas Instruments

TPL0102 Datasheet(HTML) 23 Page - Texas Instruments

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S
A6
A5
A4
A3
A2
A1
A0
0
Device (Slave) Address (7 bits)
B7
B6
B5
B4
B3
B2
B1
B0
A
Register Address N (8 bits)
D7
D6
D5
D4
D3
D2
D1
D0
A
Data Byte to Register N (8 bits)
A
P
START
R/W=0
ACK
ACK
ACK
STOP
Write to one register in a device
S
A6
A5
A4
A3
A2
A1
A0
0
Device (Slave) Address (7 bits)
A
D7
D6
D5
D4
D3
D2
D1
D0
A
Data Byte to Register N (8 bits)
D7
D6
D5
D4
D3
D2
D1
D0
Data Byte to Register N+1 (8 bits)
A
START
ACK
ACK
ACK
Write to multiple registers in a device
Register Address N (8 bits)
R/W=0
B7
B6
B5
B4
B3
B2
B1
B0
A
ACK
Master controls SDA line
Slave controls SDA line
continued
D7
D6
D5
D4
D3
D2
D1
D0
A
Data Byte to Register N+2 (8 bits)
D7
D6
D5
D4
D3
D2
D1
D0
A
Data Byte to Register N+3 (8 bits)
ACK
ACK
A
P
ACK
STOP
23
TPL0102
www.ti.com
SLIS134C – MARCH 2011 – REVISED SEPTEMBER 2015
Product Folder Links: TPL0102
Submit Documentation Feedback
Copyright © 2011–2015, Texas Instruments Incorporated
Programming with I
2C (continued)
If there are more bytes to write or read after the last register address is written to or read from in the register
map, auto increment will loop around to the register address at the beginning of the register map. For example,
after the ACR (register address 0x10h) has been written to, if there are more bytes to be written, the register
address will loop to the IVRA (register address 0x00h) at the beginning of the register map.
7.5.2.2 Write Operation
Figure 26. Write Operation to One or Multiple Registers
7.5.2.3 Repeated Start
A repeated START condition may be used in place of a complete STOP condition follow by another START
condition when performing a read function. The advantage of this is that the I2C bus does not become available
after the stop and therefore prevents other devices from grabbing the bus between transfers.



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