PSD835G2 datasheet(77/110 Pages) STMICROELECTRONICS

No. de pieza	PSD835G2

Descripción Electrónicos	Configurable Memory System on a Chip for 8-Bit Microcontrollers

PDF	110 Pages

Scroll/Zoom	100%

Fabricante Electrónico	STMICROELECTRONICS [STMicroelectronics]

Página de inicio	http://www.st.com

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77 / 110 page

PSD8XX Family

PSD835G2

Conditions

Highest Composite PLD input frequency

(Freq PLD)

8 MHz

MCU ALE frequency (Freq ALE)

4 MHz

% Flash Access

80%

% SRAM access

15%

% I/O access

5% (no additional power above base)

Operational Modes

% Normal

10%

% Power Down Mode

90%

Number of product terms used

(from fitter report)

45 PT

% of total product terms

45/193 = 23.3%

Turbo Mode

Off

Calculation (typical numbers used)

ICC total = Ipwrdown x %pwrdown + %normal x (ICC (ac) + ICC (dc))

= Ipwrdown x %pwrdown + % normal x

(%flash x 2.5 mA/MHz x Freq ALE

+ %SRAM x 1.5 mA/MHz x Freq ALE

+ % PLD x (from graph using Freq PLD)

)

= 50 µA x 0.90 + 0.1 x (0.8 x 2.5 mA/MHz x 4 MHz

+ 0.15 x 1.5 mA/MHz x 4 MHz

+ 24 mA)

= 45 µA + 0.1 x (8 + 0.9 + 24)

= 45 µA + 0.1 x 32.9

= 45 µA + 3.29 mA

= 3.34 mA

This is the operating power with no Flash writes or erases. Calculation is based

on IOUT = 0 mA.

Example of Typical Power Calculation at VCC = 5.0 V in Turbo Off Mode

AC/DC

Parameters

(cont.)

PSD835G2 Datasheet(PDF) 77 Page - STMicroelectronics

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