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MPC8377ECVRALDA Datasheet(PDF) 106 Page - Freescale Semiconductor, Inc |
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MPC8377ECVRALDA Datasheet(HTML) 106 Page - Freescale Semiconductor, Inc |
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106 / 124 page ![]() MPC8377E PowerQUICC™ II Pro Processor Hardware Specifications, Rev. 2 106 Freescale Semiconductor Clocking Table 73 provides the operating frequencies for the TePBGA II package under recommended operating conditions (see Table 3). 23.1 System PLL Configuration The system PLL is controlled by the RCWL[SPMF] parameter. The system PLL VCO frequency depends on RCWL[DDRCM] and RCWL[LBCM]. Table 74 shows the multiplication factor encodings for the system PLL. NOTE If RCWL[DDRCM] and RCWL[LBCM] are both cleared, the system PLL VCO frequency = (CSB frequency) × (System PLL VCO Divider). If either RCWL[DDRCM] or RCWL[LBCM] are set, the system PLL VCO frequency = 2 × (CSB frequency) × (System PLL VCO Divider). The VCO divider needs to be set properly so that the System PLL VCO frequency is in the range of 400–800 MHz. Table 73. Operating Frequencies for TePBGA II Parameter 1 1 The CLKIN frequency, RCWL[SPMF], and RCWL[COREPLL] settings must be chosen such that the resulting csb_clk, MCK, LCLK[0:2], and core_clk frequencies do not exceed their respective maximum or minimum operating frequencies. The value of SCCR[xCM] must be programmed such that the maximum internal operating frequency of the Security core, USB modules, SATA, and eSDHC will not exceed their respective value listed in this table. Minimum Operating Frequency (MHz) Maximum Operating Frequency (MHz) e300 core frequency ( core_clk) 333 800 Coherent system bus frequency ( csb_clk) 133 400 DDR2 memory bus frequency (MCK) 2 2 The DDR data rate is 2 × the DDR memory bus frequency. 125 200 DDR1 memory bus frequency (MCK) 2 167 333 Local bus frequency (LCLK n) 3 3 The local bus frequency is 1/2, 1/4, or 1/8 of the lbiu_clk frequency (depending on LCCR[CLKDIV]) which is in turn 1x or 2x the csb_clk frequency (depending on RCWL[LBIUCM]). —133 Local bus controller frequency ( lbc_clk)— 400 PCI input frequency (CLKIN or PCI_CLK) 25 66 eTSEC frequency — 400 Security encryption controller frequency — 200 USB controller frequency — 200 eSDHC controller frequency — 200 PCI Express controller frequency — 400 SATA controller frequency — 200 Note: |
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