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PCIMX515CJM6C Datasheet(PDF) 170 Page - Freescale Semiconductor, Inc |
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PCIMX515CJM6C Datasheet(HTML) 170 Page - Freescale Semiconductor, Inc |
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170 / 184 page  i.MX51 Applications Processors for Consumer and Industrial Products, Rev. 1 170 Freescale Semiconductor Preliminary—Subject to Change Without Notice Package Information and Contact Assignments NANDF_D5 A5 NVCC_NANDF_C UHVIO Input Keeper NANDF_D6 B6 NVCC_NANDF_C UHVIO Input Keeper NANDF_D7 C6 NVCC_NANDF_B UHVIO Input Keeper NANDF_D8 A4 NVCC_NANDF_B UHVIO Input Keeper NANDF_D9 E7 NVCC_NANDF_B UHVIO Input Keeper NANDF_RB0 D2 NVCC_NANDF_A UHVIO Input 100 k Ω pull-up NANDF_RB1 D4 NVCC_NANDF_A UHVIO Input 100 k Ω pull-up NANDF_RB2 D3 NVCC_NANDF_A UHVIO Input 100 k Ω pull-up NANDF_RB3 C1 NVCC_NANDF_A UHVIO Input 100 k Ω pull-up NANDF_RDY_INT B3 NVCC_NANDF_B UHVIO Input 100 k Ω pull-up NANDF_RE_B E2 NVCC_NANDF_A UHVIO Output — NANDF_WE_B E1 NVCC_NANDF_A UHVIO Output — NANDF_WP_B D1 NVCC_NANDF_A UHVIO Output — OWIRE_LINE E14 NVCC_PER12 GPIO Input 100 k Ω pull-up PMIC_INT_REQ AA16 NVCC_SRTC_POW GPIO Input 100 k Ω pull-up PMIC_ON_REQ W16 NVCC_SRTC_POW GPIO Input 100 k Ω pull-up PMIC_RDY AA17 NVCC_SRTC_POW GPIO Input 100 k Ω pull-up PMIC_STBY_REQ Y15 NVCC_SRTC_POW GPIO Input 100 k Ω pull-up POR_B U20 NVCC_PER3 LVIO Input 100 k Ω pull-up RESET_IN_B Y21 NVCC_PER3 LVIO Input 100 k Ω pull-up SD1_CLK A17 NVCC_PER15 UHVIO Output — SD1_CMD E16 NVCC_PER15 UHVIO Input 47 k Ω pull-up SD1_DATA0 D16 NVCC_PER15 UHVIO Input 47 k Ω pull-up SD1_DATA1 A18 NVCC_PER15 UHVIO Input 47 k Ω pull-up SD1_DATA2 F17 NVCC_PER15 UHVIO Input 47 k Ω pull-up SD1_DATA3 A19 NVCC_PER15 UHVIO Input 360 k Ω pull-down SD2_CLK B18 NVCC_PER17 UHVIO Output — SD2_CMD G17 NVCC_PER17 UHVIO Input 47 k Ω pull-up SD2_DATA0 E17 NVCC_PER17 UHVIO Input 47 k Ω pull-up SD2_DATA1 B19 NVCC_PER17 UHVIO Input 47 k Ω pull-up SD2_DATA2 D17 NVCC_PER17 UHVIO Input 47 k Ω pull-up SD2_DATA3 C17 NVCC_PER17 UHVIO Input 360 k Ω pull-down Table 114. 19 x 19 mm Signal Assignments, Power Rails, and I/O (continued) Contact Name Contact Assignment Power Rail I/O Buffer Type Direction after Reset1 Configuraton after Reset1 |
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