SSRXP

VBUS

5

6

7

8

9

4

1

3

2

Pin#

Signal Name

1

2

3

4

5

6

7

8

9

VBUS

DM

DP

GND

SSRXN

SSRXP

GND_DRAIN

SSTXN

SSTXP

SSRXN

SSTXP

SSTXN

DP

DM

90.9kW ± 1%

10kW ± 1%

SSRXP

VBUS

9

8

7

6

5

4

3

1

2

Pin#

Signal Name

1

2

3

4

5

6

7

8

9

VBUS

DM

DP

GND

SSTXN

SSTXP

GND_DRAIN

SSRXN

SSRXP

SSRXN

SSTXP

SSTXN

DP

DM

90.9kW ± 1%

10kW ± 1%

TUSB1310

SLLSE16C – DECEMBER 2009 – REVISED AUGUST 2010

www.ti.com

Figure 5-2. USB Standard-A Connector Pin Connection

Figure 5-3. USB Standard-B Connector Pin Connection

5.1.2

Clock Connections

The TUSB1310 supports an external oscillator source or a crystal unit. If a clock is provided to XI instead

of a crystal, XO is left open. Otherwise, if a crystal is used, the connection needs to follow the guidelines

below.

Since XI and XO are coupled to other leads and supplies on the PCB, it is important to keep them as short

as possible and away from any switching leads. It is also recommended to minimize the capacitance

between XI and XO. This can be accomplished by connecting the VSSOSC lead to the two external

capacitors CL1 and CL2 and shielding them with the clean ground lines. The VSSOSC should not be

connected to PCB ground.

26

DESIGN GUIDELINES

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