ADE7156_15 datasheet(57/152 Pages) AD

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ADE7116/ADE7156/ADE7166/ADE7169/ADE7566/ADE7569

Rev. B | Page 57 of

152

POWER QUALITY MEASUREMENTS

Zero-Crossing Detection

Each ADE7116/ADE7156/ADE7166/ADE7169/ADE7566/

ADE7569 has a zero-crossing detection circuit on the voltage

channel. This zero crossing is used to produce a zero-crossing

internal signal (ZX) and is used in calibration mode.

The zero crossing is generated by default from the output of

LPF1. This filter has a low cutoff frequency and is intended for

50 Hz and 60 Hz systems. If needed, this filter can be disabled

to allow a higher frequency signal to be detected or to limit the

group delay of the detection. If the voltage input fundamental

frequency is below 60 Hz, and a time delay in ZX detection is

acceptable, it is recommended that LPF1 be enabled. Enabling

LPF1 limits the variability in the ZX detection by eliminating

the high frequency components. Figure 55 shows how the zero-

crossing signal is generated.

×1, ×2, ×4,

×8, ×16

ADC 2

REFERENCE

LPF1

f–3dB = 63.7Hz

PGA2

{GAIN [7:5]}

ZERO

CROSSING

HPF

MODE 1[6]

43.24° @ 60Hz

1.0

0.73

LPF1

Figure 55. Zero-Crossing Detection on the Voltage Channel

The zero-crossing signal, ZX, is generated from the output of

LPF1 (bypassed or not). LPF1 has a single pole at 63.7 Hz (at

MCLK = 4.096 MHz). As a result, there is a phase lag between

the analog input signal V2 and the output of LPF1. The phase

lag response of LPF1 results in a time delay of approximately

2 ms (@ 60 Hz) between the zero crossing on the analog inputs

of the voltage channel and ZX detection.

The zero-crossing detection also drives the ZX flag in the

Interrupt Status 3 SFR (MIRQSTH, Address 0xDE). If the ZX

bit in the Interrupt Enable 3 SFR (MIRQENH, Address 0xDB)

is set, the 8052 core has a pending ADE interrupt. The ADE

interrupt stays active until the ZX status bit is cleared (see the

Energy Measurement Interrupts section).

Zero-Crossing Timeout

The zero-crossing detection also has an associated timeout

decremented (1 LSB) every 160/MCLK seconds. The register is

reset to its user programmed, full-scale value every time a zero

crossing is detected on the voltage channel. The default power-on

value in this register is 0xFFF. If the internal register decrements

to 0 before a zero crossing is detected in the Interrupt Status 3

SFR (MIRQSTH, Address 0xDE), and the ZXTO bit (Bit 1) in

the Interrupt Enable 3 SFR (MIRQENH, Address 0xDB) is set,

the 8052 core has a pending ADE interrupt.

The ADE interrupt stays active until the ZXTO status bit is

cleared (see the Energy Measurement Interrupts section). The

ZXTOUT register (Address 0x11) can be written to or read by

the user (see the Energy Measurement Register List section).

The resolution of the register is 160/MCLK seconds per LSB.

Thus, the maximum delay for an interrupt is 0.16 seconds

(1/MCLK × 212) when MCLK = 4.096 MHz.

Figure 56 shows the mechanism of the zero-crossing timeout

detection when the line voltage stays at a fixed dc level for more

than MCLK/160 × ZXTOUT seconds.

12-BIT INTERNAL

ZXTOUT

ZXTO

FLAG

BIT

VOLTAGE

CHANNEL

Figure 56. Zero-Crossing Timeout Detection

Period or Frequency Measurements

The ADE7116/ADE7156/ADE7166/ADE7169/ADE7566/

ADE7569 provide the period or frequency measurement of the

line. The period or frequency measurement is selected by clearing

or setting the FREQSEL bit (Bit 1) in the MODE2 register

(Address 0x0C). The period/frequency register, PER_FREQ

(Address 0x0A), is an unsigned 16-bit register that is updated

every period. If LPF1 is enabled, a settling time of 1.8 sec is

associated with this filter before the measurement is stable.

When the period measurement is selected, the measurement has a

2.44 μs/LSB (4.096 MHz/10) resolution, which represents 0.014%

when the line frequency is 60 Hz. When the line frequency is

60 Hz, the value of the period register is approximately 0d6827.

The length of the register enables the measurement of line

frequencies as low as 12.5 Hz. The period register is stable at

±1 LSB when the line is established, and the measurement does

not change.

When the frequency measurement is selected, the measurement

has a 0.0625 Hz/LSB resolution when MCLK = 4.096 MHz,

which represents 0.104% when the line frequency is 60 Hz.

When the line frequency is 60 Hz, the value of the frequency

the line is established, and the measurement does not change.

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