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UPD720122 Datasheet(PDF) 22 Page - NEC |
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UPD720122 Datasheet(HTML) 22 Page - NEC |
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22 / 82 page ![]() Data Sheet S16685EJ2V0DS 22 µPD720122 (2) CPU bus write operation Symbol Parameter Min. Typ. Max. Unit T11 Write cycle time 68 ∞ ns T12 Address setup time (WRB ↓) 5 ∞ ns T13 Chip select setup time (WRB ↓) 5 ∞ ns T14 Write command width 34 ∞ ns T15 Address hold time (WRB ↑) 5 ∞ ns T16 Chip select hold time (WRB ↑) 5 ∞ ns T17 WRB inactive time 34 ∞ ns T18 Input data setup time 10 ∞ ns T19 Input data hold time 0 ∞ ns Remark It is assumed that the external pin capacitance is 15 pF (data bus = 50 pF). CPU bus write timing WRB RDB A7 to A1 D15 to D0 CSB VALID t12 t13 t14 t19 t15 t16 t18 High level t11 t17 VALID |
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