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A25GFO080QL Datasheet(PDF) 23 Page - AMIC Technology |
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A25GFO080QL Datasheet(HTML) 23 Page - AMIC Technology |
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23 / 58 page ![]() A25LQ080 Series (April, 2016, Version 1.0) 22 AMIC Technology Corp. Read Data Bytes at Higher Speed by Quad Input and Quad Output (FAST_READ_QUAD_INPUT_OUTPUT) The FAST_READ_QUAD_INPUT_OUTPUT (EBh) instruction is similar to the FAST_READ (0Bh) instruction except the data is input and output on four pins (IO3, IO2, IO1, IO0) instead of just DO. This allows data to be transferred from the A25LQ080 at quadruple the rate of standard SPI devices. The Quad Enable bit (QE) of Status Register-2 must be set to enable the FAST_READ_QUAD_INPUT_OUTPUT Instruction. Similar to the FAST_READ instruction, the FAST_READ_QUAD_INPUT_OUTPUT instruction can operate at the highest possible frequency of fC (See AC Characteristics). Figure 12. FAST_READ_QUAD_INPUT_OUTPUT Instruction and Data-Out Sequence Instruction (EBh) 810 9 0 1 234 5 6 7 20 16 12 8 40 4 S C IO0 IO1 11 12 13 14 15 16 17 18 19 20 21 22 23 4 04 0 21 17 13 9 51 5 5 15 1 22 18 14 10 62 6 6 26 2 23 19 15 11 73 7 7 37 3 A23-16 A15-8 A7-0 Dummy Dummy Dummy Data out 1 Data out 2 IO Switches from Input to Output IO2 IO3 Note: Address bits A23 to A20 are Don’t Care, for A25LQ080. |
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