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DS1963S Datasheet(PDF) 16 Page - Dallas Semiconductor |
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DS1963S Datasheet(HTML) 16 Page - Dallas Semiconductor |
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16 / 37 page ![]() DS1963S 16 of 37 Memory and SHA Function Flow Chart (continued) Figure 7 Y DS1963S TX "0" DS1963S TX "1" Master TX Reset ? Master TX Reset ? N N Y Y SHA Finished ? N Bus Master RX "1"s SHA Engine computes Message Authentication Code of secret of selected page, data of the selected page, 3 bytes scratchpad data Serial Number of device and page W/C Counter, page #, Y N Master TX Reset? Master TX Reset ? Bus Master RX data byte from memory address DS1963S sets memory address = (T15:T0) Address < 200h ? S of Command, Address, Bus Master RX CRC16 data and counter values Bus Master RX Secret Counter of selected page Bus Master RX W/C Counter of selected page End Of Page ? Y N Master TX Reset ? Bus Master RX "1"s Y Y N N R A5h Read Auth. Page ? Bus Master TX TA1(T7:T0), TA2(T15:T8) Y N AUTH = 0 CHLG = 0 N Y Spare Vertical From Figure 7 4th part From Figure 7 6th part To Figure 7 6th part To Figure 7 4th part º Ù X = 0 ; M = MATCH (TA1[7:6] SEC#[2:1]) T4:T0 = 00000b DS1963S address increments |
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