DS1963S

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authentication was successful. User- and host authentication, if implemented, prevents the use of a

DS1963S as a coprocessor device since it requires several steps to get the MATCH flag set.

After transmitting the command code the bus master selects a memory page and its secret by transmitting

a target address anywhere within the page. Next the master transmits the SHA Control byte, which is a

code for one of the six SHA functions that can be performed. Next the master receives a CRC over the

command code, address, and control byte. As the CRC is received and the control byte and address were

valid the SHA engine will start immediately and compute a message authentication code as described in

Figure 8. While the SHA computation takes place the master will read all 1’s. As the computation is

finished the pattern will change to alternating 0’s and 1’s. The master must read at least 8 bits of this

alternating pattern. Otherwise the device might not properly respond to a subsequent Reset Pulse. In case

of an invalid control byte or address the master will continue reading all 1’s until it issues a Reset Pulse.

The exact location of the various data segments as they enter the input buffer of the SHA engine is shown

in Table 2.

Compute SHA Functions Figure 8

SHA Engine computes

Message Authentication Code

of a NULL secret,

data of the selected page and

15 bytes of scratchpad data

SUCCESS

SHA Engine computes

Message Authentication Code

of secret of the selected page,

data of the selected page and

15 bytes of scratchpad data

SUCCESS

SUCCESS

X = 0 ; HIDE = 1

CHLG = 0 ; AUTH = 0

T4:T0 = 00000b

N

From Compute SHA

Command (Figure 7)

0Fh

Compute 1st

Secret

?

N

F0h

Compute next

Secret

?

N

3Ch

Validate Data

Page

?

Continued

below

SHA Engine computes

Message Authentication Code

of secret of the selected page,

data of the selected page and

15 bytes of scratchpad data

HIDE = 1 ; CHLG = 0

AUTH = 0 ; MATCH = 0

M = 0 ; X = 0

HIDE = 1 ; CHLG = 0

AUTH = 0 ; MATCH = 0

M = 0 ; X = 0

º

Ù

M = MATCH

(TA1[7:6]

SEC#[2:1])

To Compute SHA Command (Figure 7)

Y

Y

Y

E4:E0 = 11111b

E4:E0 = 11111b

Read Authenticated Page and Compute Challenge allow the master to input a 3-byte “challenge” in the

computation via scratchpad locations 20 through 22. All other data is taken from the selected memory

page, associated secret, cycle counter, ROM Registration number and flags. With Compute First Secret

and Compute Next Secret the scratchpad locations 8 through 22 need to be filled with a partial secret

before the SHA computation takes place. A coprocessor device performing a Validate Data Page or Sign

Data Page command must have in scratchpad bytes 8 through 11 the (incremented) value of the cycle

counter of the selected memory page of the roaming device, and it must have in bytes 13 through 19 the

ROM Registration Number (without CRC), and in byte 12 the page number. A roaming device