STV3550 datasheet(77/144 Pages) STMICROELECTRONICS

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CPU and System Management Functional Description

STV3550

77/144

Flash and SDRAM devices share the lower half of the data bus. As a result, placing memory

devices on the board requires additional restrictions compared to the low-cost configuration.

Since the data word size is 32 bits, address outputs ADDR[12:1] are connected to the SDRAM

address bus, and address outputs ADDR[16:15] are used as Bank Activate signals.

Note that outputs NOT_BE[1:0] are connected to DQM[3:2], while DQM[1:0] are provided through

address outputs ADDR[19:18]. This means that internal Byte Enable 0 and 1 are provided through

ADDR[19:18] and Byte Enable 2 and 3 are provided through NOT_BE[1:0]. The Flash is a Read-

only device.

6.3.11.3 High-End Configuration with two SDRAM Devices

This configuration requires two SDRAM devices with 16 data lines each. A typical size of the

SDRAMs may be 64 Mbits (8 MBytes).

One SDRAM device is connected to the upper half of the data bus, while the other device is

connected to the lower half. The Flash memory shares the lower half of the data bus with one of the

SDRAM devices.

From STV3550 point of view, since the data word size is 32 bits, address outputs ADDR[12:1] are

connected to the SDRAM address buses, and address outputs ADDR[16:15] are used as Bank

Activate signals.

Note that outputs NOT_BE[1:0] are connected to DQM[1:0] of the SDRAM connected to the upper

half of the data bus, while address outputs ADDR[19:18] are driving DQM[1:0] of the other SDRAM.

This means that internal Byte Enable 0 and 1 are provided through ADDR[19:18] and Byte Enable

2 and 3 are provided through NOT_BE[1:0]. The Flash is a Read-only device.

Figure 49: High-End Configuration using 1 SDRAM Device

ADDR[19:0]

DATA[15:0]

A[11:0]

DQ[31:0]

RAS

CAS

FLASH

16Mb

DQM[3:2]

SDRAM

128Mb

STV3550

NOT_CS_FLASH

ADDR[19:0]

FLASH_D[15:0]

NOT_RAS

NOT_CAS

RD_NOT_WR

NOT_BE[1:0]

CKOUT_SDRAM

SDRAM_D[15:0]

NOT_CS_SDRAM

[19:0]

[12:1]

[15:0]

[19:0]

CLK

BA[1:0]

[16:15]

CKEN

CKIN_SDRAM

DQM[1:0]

[19:18]

[15:0]

(LSBs)

(MSBs)

[31:0]

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