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STV3550 Datasheet(PDF) 98 Page - STMicroelectronics

No. de pieza STV3550
Descripción Electrónicos  LCD and Matrix Display TV Processor
PDF  144 Pages
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Fabricante Electrónico  STMICROELECTRONICS [STMicroelectronics]
Página de inicio  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STV3550 Datasheet(HTML) 98 Page - STMicroelectronics

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STV3550
The SSC2 can also be configured to loop the serial_data_out back to serial_data_in in order to test
the device without any external connections. This is described in Section 7.7.10: Loopback Mode.
The SSC2 can be turned on and off by setting the enable control. This is described in Section
7.7.11: Enabling Operation.
The SSC2 can be set to operate as a bus master or as a bus slave device. This is described in
Section 7.7.12: Master/Slave Operation.
The SSC2 generates interrupts in a variety of situations: when the transmission buffer is empty,
when the receive buffer is full and when an error occurs. A number of error conditions are detected.
These are described in Section 7.7.13: Error Detection.
7.7.3
PIO Pad Connection & Control
In I²C mode, only the SDA pad will be used as an input and output.
The SDA and SCL pads are provided by 2 bits of a standard ST20 PIO block. Their directions (input,
output or bidirectional) can therefore be configured in software using the appropriate PIO settings.
Consequently the SSC2 does not need to provide automatic control of data pad directions and does
not need to provide a bidirectional clock port.
Figure 62: Basic SSC2 Architecture
Clock Edge
Detector
Shift Register
Transmit
Receive
Peripheral Interface
SERIAL_CLOCK_IN
SERIAL_DATA_IN
SERIAL_DATA_OUT
SERIAL_CLOCK_OUT
Loopback
Control
Enable
Control
Pin
Control
SERIAL_DATA_IN
SERIAL_DATA_OUT
Master/Slave
Select
Buffer
Buffer
PER_INTERRUPT, INT_ERROR
INT_TIR, INT_RIR
Clock
Generator
& Control



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