SL28610 datasheet(6/23 Pages) SILABS

6 / 23 page

SL28610

........................ DOC #: SP-AP-0078 (Rev. 1.0) Page 6 of 23

PCIe2_OE

Output enable for SCR2

0 = Output Disabled, 1 = Output Enabled

DOT96_OE

Output enable for DOT96

0 = Output Disabled, 1 = Output Enabled

LCD_OE

Output enable for LCD

0 = Output Disabled, 1 = Output Enabled

Byte 2: Control Register 2 (continued)

Bit

@Pup

Name

Description

Byte 3: Control Register 3

Bit

@Pup

Name

Description

RESERVED

REF_OE

Output enable for REF

0 = Output Disabled, 1 = Output Enabled

REF_Bit1

REF Slew Rate Control Bit2(see Byte 16 Bit [7:6] for Slew Rate REF_Bit0 & REF_Bit2)

0 = 1 load, 1 = 2 loads

RESERVED

CPU0_STP#

CPU0 CPU_STP# Control

0 = Free Running, 1 = Stopped with CPU_STP#

CPU1_STP#

CPU1 CPU_STP# Control

0 = Free Running, 1 = Stopped with CPU_STP#

CPU2_STP#

CPU2 CPU_STP# Control

0 = Free Running, 1 = Stopped with CPU_STP#

Byte 4: Control Register 4

Bit

@Pup

Name

Description

PLL1 M DIV 7

This is a read only register of the multiplier used for PLL1 M Divider

HW= Read Only

PLL1 M DIV 6

PLL1 M DIV 5

PLL1 M DIV 4

PLL1 M DIV 3

PLL1 M DIV 2

PLL1 M DIV 1

PLL1 M DIV 0

Byte 5: Control Register 5

Bit

@Pup

Name

Description

PLL1 N DIV 7

This is a read only register of the multiplier used for PLL1 N Divider

HW= Read Only

PLL1 N DIV 6

PLL1 N DIV 5

PLL1 N DIV 4

PLL1 N DIV 3

PLL1 N DIV 2

PLL1 N DIV 1

PLL1 N DIV 0

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