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SL28610 Datasheet(PDF) 17 Page - Silicon Laboratories |
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SL28610 Datasheet(HTML) 17 Page - Silicon Laboratories |
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17 / 23 page  SL28610 ...................... DOC #: SP-AP-0078 (Rev. 1.0) Page 17 of 23 TPERIODSSAbs 166 MHz CPU Clock Absolute period, SSC Measured at 0V differential at 1 clock 5.913201 6.116960 ns TPERIODSSAbs 200 MHz CPU Clock Absolute period, SSC Measured at 0V differential at 1 clock 4.91453 5.11060 ns TCCJ CPUT/C Cycle to Cycle Jitter Measured at 0V differential – 85 ps LACC_non-SSC Long-term Accuracy Measured at 0V differential – 300 ppm LACC_SSC Long-term Accuracy Measured at 0V differential – 2800 ppm TSKEW Pin-to-pin Skew Measured at 0V differential – 100 ps TR / TF CPU Clock Rise and Fall Time Measured differentially from ±150 mV 0.6 4 V/ns TRFM Rise/Fall Matching Measured single-endedly from ±75 mV – 20 % Vabs Absolute Min and Max VSWING Measured single-endedly –0.3 1.15V V VOX Crossing Point Voltage at 0.7V Swing Measured single-endedly 300 550 mV Vox_variation Crossing Point Variation Measured single-endedly 140 mV VOVS Maximum Voltage (Overshoot) Measured single-endedly VHIGH+ 0.3V V VUDS Maximum Voltage (Undershoot) Measured single-endedly 0.3 V VRB Ring back voltage Measured single-endedly -100 100 mV TSTABLE Time before VRB Measured single-endedly 500 ps PCIe at 0.7V TDC PCIe Clock Duty Cycle Measured at 0V differential 45 55 % TPERIOD 100 MHz PCIe Clock Period Measured at 0V differential at 0.1s 9.997001 10.0030 ns TPERIODSS 100 MHz PCIe Clock Period, SSC Measured at 0V differential at 0.1s 9.997001 10.05327 ns TPERIODAbs 100 MHz PCIe Clock Absolute Period Measured at 0V differential at 1 clock 9.912001 10.08800 ns TPERIODSSAbs 100 MHz PCIePCIe Clock Absolute Period, SSC Measured at 0V differential at 1 clock 9.912001 10.13827 ns TCCJ PCIe Clock Cycle to Cycle Jitter Measured at 0V differential – 125 ps LACC_non-SSC Long-term Accuracy Measured at 0V differential – 300 ppm LACC_SSC Long-term Accuracy Measured at 0V differential – 2800 ppm TSKEW Pin-to-pin Skew Measured at 0V differential – 100 ps TR / TF PCIe Clock Rise and Fall Time Measured differentially from ±150 mV 0.6 4 V/ns TRFM Rise/Fall Matching Measured single-endedly from ±75 mV – 20 % Vabs Absolute Min and Max VSWING Measured single-endedly –0.3 1.15V V VOX Crossing Point Voltage at 0.7V Swing Measured single-endedly 300 550 mV Vox_variation Crossing Point Variation Measured single-endedly 140 mV VOVS Maximum Voltage (Overshoot) Measured single-endedly VHIGH+ 0.3V V VUDS Maximum Voltage (Undershoot) Measured single-endedly 0.3 V VRB Ring back voltage Measured single-endedly -100 100 mV TSTABLE Time before VRB Measured single-endedly 500 ps DOT96 at 0.7V TDC DOT96 Clock Duty Cycle Measured at 0V differential 45 55 % TPERIOD DOT96 Clock Period Measured at 0V differential at 0.1s 10.41354 10.41979 ns TPERIODAbs DOT96 Clock Absolute Period Measured at 0V differential at 0.1s 10.16354 10.66979 ns TCCJ DOT96 Clock Cycle to Cycle Jitter Measured at 0V differential at 1 clock – 250 ps LACC DOT96 Clock Long Term Accuracy Measured at 0V differential at 1 clock – 300 ppm AC Electrical Specifications (continued) Parameter Description Condition Min. Max. Unit |
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