LSM6DSR datasheet(51/168 Pages) STMICROELECTRONICS

51 / 168 page

9.15

CTRL1_XL (10h)

Accelerometer control register 1 (r/w)

Table 48. CTRL1_XL register

ODR_XL3

ODR_XL2

ODR_XL1

ODR_XL0

FS1_XL

FS0_XL

LPF2_XL_EN

0(1)

1. This bit must be set to '0' for the correct operation of the device.

Table 49. CTRL1_XL register description

ODR_XL[3:0]

Accelerometer ODR selection (see Table 50).

FS[1:0]_XL

Accelerometer full-scale selection. Default value: 00

(00: ±2 g; 01: ±16 g; 10: ±4 g; 11: ±8 g)

LPF2_XL_EN

Accelerometer high-resolution selection

(0: output from first stage digital filtering selected (default);

1: output from LPF2 second filtering stage selected)

Table 50. Accelerometer ODR selection

ODR_XL3 ODR_XL2 ODR_XL1 ODR_XL0

ODR selection [Hz] when

XL_HM_MODE = 1 in CTRL6_C

(15h)

ODR selection [Hz] when

XL_HM_MODE = 0 in CTRL6_C

(15h)

Power-down

1.6 Hz (low power only)

N.A.

12.5 Hz (low power)

12.5 Hz (high performance)

26 Hz (low power)

26 Hz (high performance)

52 Hz (low power)

52 Hz (high performance)

104 Hz (normal mode)

104 Hz (high performance)

208 Hz (normal mode)

208 Hz (high performance)

416 Hz (high performance)

833 Hz (high performance)

1.66 kHz (high performance)

3.33 kHz (high performance)

6.66 kHz (high performance)

Not allowed

LSM6DSR

CTRL1_XL (10h)

DS11976 - Rev 2

page 51/168

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