ADS6445 datasheet(23/75 Pages) STMICROELECTRONICS

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ADS6445, ADS6444

ADS6443, ADS6442

SLAS531 – MAY 2007

Table 16. Serial Register D

BITS

ADDRESS

A4 - A0

D10

CUSTOM PATTERN (LOWER 11 BITS)

D10 - D0

<CUSTOM A> Lower 11 bits of custom pattern <D10>

…<D0>

Table 17. Serial Register E

BITS

ADDRESS

A4 - A0

D10

FINE GAIN CONTROL (1 dB to 6 dB)

CUSTOM PATTERN (UPPER 3 BITS)

D4 - D0

<CUSTOM B> Upper 3 bits of custom pattern <D13>

…<D11>

D10-D8

<FINE GAIN> Fine gain control

000

0 dB Gain (full-scale range = 2.00 VPP)

001

1 dB Gain (full-scale range = 1.78 VPP)

010

2 dB Gain (full-scale range = 1.59 VPP)

011

3 dB Gain (full-scale range = 1.42 VPP)

100

4 dB Gain (full-scale range = 1.26 VPP)

101

5 dB Gain (full-scale range = 1.12 VPP)

110

6 dB Gain (full-scale range = 1.00 VPP)

Table 18. Serial Register F

BITS

ADDRESS

A4 - A0

D10

<COARSE

FALLING

<OVRD>

BYTE-WISE

GAIN>

OR RISING

14-BIT OR

DDR OR

1-WIRE OR

MSB OR

OVER-RIDE

COURSE

BIT CLOCK

16-BIT

SDR BIT

2-WIRE

LSB FIRST

BITE

BIT-WISE

GAIN

CAPTURE

SERIALIZE

CLOCK

INTERFACE

ENABLE

EDGE

Interface selection

1 Wire interface

2 Wire interface

Bit clock selection (only in 2-wire interface)

DDR Bit clock

SDR Bit clock

Serialization factor selection

14X Serialization

16X Serialization

Bit clock capture edge (only when SDR bit clock is selected, D1 = 1)

Capture data with falling edge of bit clock

Capture data with rising edge of bit clock

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