ELANSC310 datasheet(12/119 Pages) AMD

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Élan™SC310 Microcontroller Data Sheet

PREL IMINARY

ÉLANSC310 MICROCONTROLLER PIN DESIGNATIONS

This section, beginning with the Connection Diagram

on the preceding page, identifies the pins of the

ÉlanSC310 microcontroller and lists the signals associ-

ated with each pin. Tables 2–10, beginning on page 22,

group these signals according to function. The table

beginning on page 13 lists the pins sorted by pin num-

ber; the table beginning on page 15 lists the pins sorted

by pin name along with the corresponding pin number,

functional grouping, Pin State table number, and the

page number where a description of the pin is located.

The Signal Name column in the pin designation table

(sorted by pin number), and in Tables 2–10, is decoded

as follows:

NAME1 / NAME2 [NAME3] (NAME4)

NAME1 - This is the pin function when the ÉlanSC310

microcontroller has been configured, at reset, for the

Local Bus mode of operation. If the pin only has one

function regardless of the mode, NAME1 is the only

name given.

NAME2 - This is the secondary pin function (by default)

when the ÉlanSC310 microcontroller has been config-

ured, at reset, for the Local Bus mode of operation. If

the pin always has two functions regardless of the

mode, NAME1 followed by NAME2 are the only names

given.

NAME3 - This is a tertiary pin function that must be en-

abled specifically by firmware. As an example, for pins

DACK2[TCK], DRQ2[TDO], AEN[TDI], and TC[TMS],

the NAME3 function is selected by the JTAGEN pin

being asserted High (JTAG ENABLE).

NAME4 - Designates the pin function when the

ÉlanSC310 microcontroller has been configured, at re-

set, for the Maximum ISA mode of operation.

RSVD - Pins marked with this designator are required

to remain unconnected.

PULLUP - Needs external pull-up resistor.

PULLDN - Needs external pull-down resistor.

The Signal Name column in the pin designation table

(sorted by pin name), beginning on page 13, contains

an alphabetical listing of all pin names, followed by

their corresponding alternate pin names in the applica-

ble format from those listed here:

NAME1 / NAME2 [NAME3] (NAME4 / NAME5)

NAME2 / NAME1 [NAME3] (NAME4 / NAME5)

[NAME3] (NAME4 / NAME5) NAME1 / NAME2

(NAME4 / NAME5) NAME1 / NAME2 [NAME3]

(NAME5 / NAME4) NAME1 / NAME2 [NAME3]

For more information about how pins are shared and

which functions are available in each bus mode, see

“Alternate Pin Functions” on page 59

ELANSC310 Datasheet(PDF) 12 Page - Advanced Micro Devices

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