DSP56303 datasheet(186/292 Pages) FREESCALE

186 / 292 page

DSP56303 User’s Manual, Rev. 2

8-18

Freescale Semiconductor

Serial Communication Interface (SCI)

The SCI clock determines the data transmission (baud) rate and can also establish a periodic

interrupt that can act as an event timer or be used in any other timing function. Bits CD11– CD0,

SCP, and SCR[STIR] work together to determine the time base. If SCR[TMIE] = 1 when the

periodic time-out occurs, the SCI timer interrupt is recognized and pending. The SCI timer

interrupt is automatically cleared when the interrupt is serviced. This interrupt occurs every time

the periodic timer times out.

Figure 8-5 shows the block diagram of the internal clock generation circuitry with the formula to

compute the bit rate when the internal clock is used.

As noted in Section 8.6.1, the SCI can be configured to operate in a single Synchronous mode or

one of five Asynchronous modes. Synchronous mode requires that the TX and RX clocks use the

same source, but that source may be the internal SCI clock if the SCI is configured as a master

device or an external clock if the SCI is configured as a slave device. Asynchronous modes may

use clocks from the same source (internal or external) or different sources for the TX clock and

the RX clock.

For synchronous operation, the SCI uses a clock that is equal to the two times the desired bit rate

(designated as the 2

× clock) for both internal and external clock sources. It must use the same

source for both the TX and RX clock. The internal clock is used if the SCI is the master device

Figure 8-5. SCI Baud Rate Generator

Fcore

Divide

By 2

12-bit Counter

Prescaler:

Divide by

1 or 8

Internal Clock

SCI Core Logic

Uses Divide by 16 for

Asynchronous

Uses Divide by 2 for

Synchronous

COD

SCKP

If Asynchronous

Divide by 1 or 16

If Synchronous

Divide By 2

SCLK

Divide

By 2

Divide

by 16

Timer

Interrupt

(STMINT)

Fcore

bps = 64

× (7(SCP) + 1) × CD + 1)

where:

SCP = 0 or 1

CD = $000 to $FFF

STIR

SCKP = 0

SCKP = 1

CD[11–0]

SCP

DSP56303 Datasheet(PDF) 186 Page - Freescale Semiconductor, Inc

DSP56303 Datasheet(HTML) 186 Page - Freescale Semiconductor, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Descarga

Enlace URL