MP2886A datasheet(49/113 Pages) MPS

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MP2886A – DIGITAL PWM CONTROLLER WITH PMBUS AND PWM-VID

MP2886A Rev. 1.0

www.MonolithicPower.com

1/21/2019

MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.

PHASE_CNT_HOLD_FS

_EN

Enable bit for holding the frequency loop for a certain amount of time when the

phase count changes.

0: disable

1: enable

DVID_HOLD_FS_EN

Enable bit for holding the frequency loop for a certain amount of time during DVID.

0: disable

1: enable

11:8

FS_LOOP_HOLD_TIME

Frequency loop holding time. 100µs/LSB.

FS_LOOP_EN

Enable bit for the PWM frequency loop.

0: disable

1: enable

6:0

FS_LOOP_KI

PWM frequency loop integral parameter.

MFR_T_ALERT_CTRL (34h)

This register sets the thermal alert pin (TALERT#) behavior.

Command

MFR_T_ALERT_CTRL

Format

Unsigned binary

Bit

Access

r/w

Function

T_ALT_DELAY

TSNS_T_ALT_THRE

Bits

Bit Name

Description

15:14

RESERVED

Unused. X indicates that writes are ignored and always read as 0.

13:11

T_ALT_DELAY

Trigger delay time for pulling TALERT# low. 100µs/LSB.

TSNS_CURRENT_DIS

Enable bit for sourcing a 10µA constant current from TSNS to the thermistor to

generate a voltage for the temperature sensing.

0: enable

1: disable

TSNS_T_ALT_EN

Enable bit for pulling TALERT# low when the controller detects an over-

temperature warning from TSNS.

0: disable

1: enable

TEMP_T_ALT_EN

Enable bit for pulling TALERT# low when the controller detects an over-

temperature warning from VTEMP.

0: disable

1: enable

7:0

TSNS_T_ALT_THRE

Digital threshold of the over-temperature warning from TSNS.

TSNS_T_ALT_THRE = Rt x 10µA x 256 / 1.6V

MP2886A Datasheet(PDF) 49 Page - Monolithic Power Systems

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