MPC8378E datasheet(54/128 Pages) FREESCALE

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MPC8378E PowerQUICC II Pro Processor Hardware Specifications, Rev. 8

Freescale Semiconductor

11.2.2.2

Full-Speed Read Meeting Hold (Minimum Delay)

There is no minimum delay constraint due to the full clock cycle between the driving and sampling of data.

tCLK_DELAY + tOH + tDATA_DELAY > tSFSIXKH

Eqn. 9

This means that Data + Clock delay must be greater than –2 ns. This is always fulfilled.

11.3

eSDHC AC Timing Specifications (High-Speed Mode)

This table provides the eSDHC AC timing specifications for high-speed mode as defined in Figure 34 and

Figure 35.

Table 48. eSDHC AC Timing Specifications for High-Speed Mode

At recommended operating conditions OVDD = 3.3 V ± 165 mV.

Parameter

Symbol1

Min

Max

Unit

Note

SD_CLK clock frequency—high speed mode

fSHSCK

050

MHz

—

SD_CLK clock cycle

tSHSCK

—

SD_CLK clock frequency—identification mode

fSIDCK

0400

KHz

—

SD_CLK clock low time

tSHSCKL

7—

SD_CLK clock high time

tSHSCKH

7—

SD_CLK clock rise and fall times

tSHSCKR/

tSHSCKF

—3

Input setup times: SD_CMD, SD_DATx, SD_CD to

SD_CLK

tSHSIVKH

5—

Input hold times: SD_CMD, SD_DATx, SD_CD to SD_CLK

tSHSIXKH

0—

Output delay time: SD_CLK to SD_CMD, SD_DATx valid

tSHSKHOV

—4

Output Hold time: SD_CLK to SD_CMD, SD_DATx invalid

tSHSKHOX

0—

SD_CLK delay within device

tINT_CLK_DLY

1.5

—

SD Card Input Setup

tISU

6—

SD Card Input Hold

tIH

2—

SD Card Output Valid

tODLY

—14

SD Card Output Hold

tOH

2.5

—

Notes:

1. The symbols used for timing specifications herein follow the pattern of t(first three letters of functional block)(signal)(state)

(reference)(state) for inputs and t(first three letters of functional block)(reference)(state)(signal)(state) for outputs. For example, tSFSIXKH

symbolizes eSDHC full mode speed device timing (SFS) input (I) to go invalid (X) with respect to the clock reference (K)

going to high (H). Also tSFSKHOV symbolizes eSDHC full speed timing (SFS) for the clock reference (K) to go high (H), with

respect to the output (O) going valid (V) or data output valid time. Note that, in general, the clock reference symbol

representation is based on five letters representing the clock of a particular functional. For rise and fall times, the latter

convention is used with the appropriate letter: R (rise) or F (fall).

2. Measured at capacitive load of 40 pF.

3. For reference only, according to the SD card specifications.

4. Average, for reference only.

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