MPC8378E datasheet(55/128 Pages) FREESCALE

No. de pieza	MPC8378E

Descripción Electrónicos	PowerQUICC II Pro Processor

PDF	128 Pages

Scroll/Zoom	100%

Fabricante Electrónico	FREESCALE [Freescale Semiconductor, Inc]

Página de inicio	http://www.freescale.com

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55 / 128 page

MPC8378E PowerQUICC II Pro Processor Hardware Specifications, Rev. 8

Freescale Semiconductor

This figure provides the eSDHC clock input timing diagram.

Figure 33. eSDHC Clock Input Timing Diagram

11.3.1

High-Speed Output Path (Write)

This figure provides the data and command output timing diagram.

Figure 34. High Speed Output Path

11.3.1.1

High-Speed Write Meeting Setup (Maximum Delay)

The following equations show how to calculate the allowed skew range between the SD_CLK and

SD_DAT/CMD signals on the PCB.

Zero clock delay:

tSHSKHOV + tDATA_DELAY + tISU < tSHSCKL

Eqn. 10

With clock delay:

tSHSKHOV + tDATA_DELAY + tISU < tSHSCKL + tCLK_DELAY

Eqn. 11

tDATA_DELAY – tCLK_DELAY < tSHSCKL – tISU – tSHSKHOV

Eqn. 12

eSDHC

tSHSCKR

External Clock

tSHSCK

tSHSCKF

VM = Midpoint Voltage (OVDD/2)

operational mode

tSHSCKL

tSHSCKH

Output valid time: tSHSKHOV

Output hold time: tSHSKHOX

tIH (2 ns)

tCLK_DELAY

Input at the

SD CLK at

Driving

Edge

Sampling

edge

the card Pin

SD card pins

tISU (6 ns)

tDATA_DELAY

tSHSCKL

tSHSCK (clock cycle)

SD CLK at the

MPC8378E pin

Output from the

MPC8378E pins

MPC8378E Datasheet(PDF) 55 Page - Freescale Semiconductor, Inc

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