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WM8741GEDS/V Datasheet(PDF) 12 Page - Wolfson Microelectronics plc

No. de pieza WM8741GEDS/V
Descripción Electrónicos  24-bit 192kHz DAC with Advanced Digital Filtering
PDF  64 Pages
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Fabricante Electrónico  WOLFSON [Wolfson Microelectronics plc]
Página de inicio  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

WM8741GEDS/V Datasheet(HTML) 12 Page - Wolfson Microelectronics plc

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WM8741
Production Data
w
PD, Rev 4.2, October 2009
12
MASTER CLOCK TIMING
Figure 1 Master Clock Timing Requirements
Test Conditions
AVDD = 5V, DVDD = 3.3V, AGND = 0V, DGND = 0V, TA = +25
oC
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Master Clock Timing Information
MCLK Master clock pulse width high
tMCLKH
10
ns
MCLK Master clock pulse width low
tMCLKL
10
ns
MCLK Master clock cycle time
tMCLKY
27
ns
MCLK Duty cycle
40:60
60:40
Table 1 MCLK Timing Requirements
PCM DIGITAL AUDIO INTERFACE TIMINGS
Figure 2 Digital Audio Data Timing
Test Conditions
AVDD = 5V, DVDD = 3.3V, AGND = 0V, DGND = 0V, TA = +25
oC, fs = 48kHz, MCLK = 256fs unless otherwise stated.
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Audio Data Input Timing Information
BCLK cycle time
tBCY
40
ns
BCLK pulse width high
tBCH
16
ns
BCLK pulse width low
tBCL
16
ns
LRCLK set-up time to BCLK
rising edge
tLRSU
8
ns
LRCLK hold time from
BCLK rising edge
tLRH
8
ns
DIN set-up time to BCLK
rising edge
tDS
8
ns
DIN hold time from BCLK
rising edge
tDH
8
ns
Table 2 Digital Audio Interface Timing Requirements



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