AN2647 datasheet(15/34 Pages) STMICROELECTRONICS

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AN2647

Interfacing with asynchronous memory

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1.2.2

EMI port configuration

Ports 7, 8 and 9 at power up are default to GPIO ports; your software has to program the

ports to function as an EMI bus. Table 4. below shows all possible port function and

configuration. The registers that need to be configured include:

SCU_GPIOOUTx - Select the Alternative output function: ALT2 or ALT3

SCU_GPIOTYPEx - Select the port driver: push-pull or open drain

SCU_EMI -Select EMI mode

SCU_SCR0 - Select the multiplexed mode, ALE length and polarity.

Table 3.

BCR register configuration bits

Bit

Name

Bit value

Bit 17

SYNCWRITEDEV

0: Asynchronous write device (default)

1: Synchronous device

Bit [11:10]

BRLEN[1:0]

Burst Read Transfer Length. These bits are written by

software to define the transfer length for burst or page mode

read cycle. Page mode is limited to 4 or 8 transfer.

00: 4-transfer burst read

01: 8-transfer burst read

10: 16-transfer burst read

11: Continuous (synchronous only)

Bit 9

SYNCREADDEV

Synchronous read access device. Access the device using

synchronous accesses for reads:

0: Asynchronous device (default).

1: Synchronous device.

Bit 8

BPM

Burst and Page Mode Read Selection This bit is set and

cleared by software to select/deselect Burst or Page Mode

read.

00: 8-bit

01: 16-bit

Bit[5:4]

MW[1:0]

Memory width define the data bus and memory width of the

EMI bus.

00: 8-bit EMI bus

01: 16-bit EMI bus

Bit 3

Write protect - to protect/unprotect the bank from write

access.

0: Bank not write protected

1: Bank write protected

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