PM0056 datasheet(94/156 Pages) STMICROELECTRONICS

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The Cortex-M3 instruction set

PM0056

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DocID15491 Rev 5

CMP

Rn, #0

BNE

label

Restrictions

The restrictions are:

•

Rn must be in the range of R0 to R7

•

The branch destination must be within 4 to 130 bytes after the instruction

•

These instructions must not be used inside an IT block.

Condition flags

These instructions do not change the flags.

Examples

CBZ

R5, target ; Forward branch if R5 is zero

CBNZ

R0, target ; Forward branch if R0 is not zero

3.8.7

If-Then condition instruction.

Syntax

IT{x{y{z}}} cond

where:

•

‘x’ specifies the condition switch for the second instruction in the IT block.

•

‘y’ specifies the condition switch for the third instruction in the IT block.

•

‘z’ specifies the condition switch for the fourth instruction in the IT block.

•

‘cond’ specifies the condition for the first instruction in the IT block.

The condition switch for the second, third and fourth instruction in the IT block can be either:

T: Then. Applies the condition cond to the instruction.

E: Else. Applies the inverse condition of cond to the instruction.

It is possible to use AL (the always condition) for cond in an IT instruction. If this is

done, all of the instructions in the IT block must be unconditional, and each of x, y,

and z must be T or omitted but not E.

Operation

The IT instruction makes up to four following instructions conditional. The conditions can be

all the same, or some of them can be the logical inverse of the others. The conditional

instructions following the IT instruction form the IT block.

The instructions in the IT block, including any branches, must specify the condition in the

{cond} part of their syntax.

PM0056 Datasheet(PDF) 94 Page - STMicroelectronics

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