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STV3550 Datasheet(PDF) 115 Page - STMicroelectronics |
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STV3550 Datasheet(HTML) 115 Page - STMicroelectronics |
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115 / 144 page  STV3550 115/144 In order to meet these various timing requirements of the I²C standard a number of counters are included in the design. These are programmed to take a number of constants which will provide the times required. The constants are defined for a particular system clock frequency to be sufficient to meet the minimum timing requirements (there are no maximum times defined for these timings). If the system clock frequency is higher or very much slower than the one used to define the constants then the values need to be re-defined. The constants used for the current implementation are shown in Table 23. 3. In FAST mode, but when used with normal mode devices must still meet the 250ns minimum 4. Where Cb is the total capacitance on one bus line in pF Table 25: I²C Timing Constants I²C Timing Name I²C Standard Minimum Time Constant Value (cycles) Time Produced At 60 MHz Data Hold Time 300ns 21 350ns Setup Time For STOP Condition TSU.STO 4.0us 300 5.0us Setup Time For START (repeated) Condition TSU.ST 4.7us 300 5.0us Hold Time (repeated) START Condition THD:STA 4.0us 300 5.0us Data Setup Time TSU:DAT 250ns 21 300ns |
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