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CTS9513API-2 Datasheet(PDF) 3 Page - List of Unclassifed Manufacturers

No. de pieza CTS9513API-2
Descripción Electrónicos  5 Chan 16 bit 20MHz Counter/Timer
PDF  28 Pages
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CTS9513API-2 Datasheet(HTML) 3 Page - List of Unclassifed Manufacturers

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Celeritous Technical Services Corp
800.687.6510 / 806.793.0708
3308 34th St
FAX
806.793.0710
Lubbock, Texas 79410
http://www.celeritous.com
SPECIFICATIONS SUBJECT TO CHANGE WITHOUT NOTICE
Copyright 2000 Celeritous Technical Services Corp
3
Rev E
Tuesday, September 25,
CTS9513-2
5 Chan 16 bit 20MHz Counter/Timer
2
1
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
VCC
OUT 2
OUT 1
GATE 1
X 1
X 2
FOUT
C/D
RD
D0
D1
D2
D3
D4
D5
D6
WR
CS
D7
GATE 1A / D8
OUT 3
GATE 2
OUT 4
OUT 5
GATE 3
GATE 4
GATE 5
SOURCE 1
SOURCE 2
SOURCE 3
SOURCE 4
SOURCE 5
D 15
D 14
D 13
GATE 5A / D12
GATE 4A / D11
GATE 3A / D10
GATE 2A / D9
VSS
Figure 2 - CTS9513 DIP-40 Package Pinouts
Table 2 - CTS9513 Ordering Information
CTSC9513A
x
x
-
x
Package
Plastic DIP-40
P
Plastic PLCC-44
J
Temperature Range
Industrial (-40 - 85º C)
I
Maximum Clock Speed
20 MHz
2
Pin
Signal
Pin
Signal
1
VCC
23
D8
2
OUT2
24
VSS
3
NC
25
D9
4
OUT1
26
D10
5
GATE1
27
D11
6
X1
28
D12
7
X2
29
D13
8
FOUT
30
D14
9
NC
31
D15
10
C/D
32
NC
11
WR
33
SOURCE5
12
CS
34
SOURCE4
13
RD
35
SOURCE3
14
NC
36
SOURCE2
15
D0
37
SOURCE1
16
D1
38
GATE5
17
D2
39
GATE4
18
D3
40
GATE3
19
D4
41
OUT5
20
D5
42
OUT4
21
D6
43
GATE2
22
D7
44
OUT3
PLCC-44 Package Pinouts
Table 2. PLCC-44 Pinouts
Figure 3. PLCC-44 Outline
GATE1-5 (Counter Gate Inputs)
Gate inputs are used
to control counter
behavior. Any gate may be routed to one of
three
internal counters. They may also be
used as clock or count input sources for the
internal counters or FOUT divider. The GATE
lines may be programmed for use as counter
enables, counter triggers or inhibits. Individ-
ual counters may be programmed for active
polarity as well as to be level or edge sensitive
to the GATE line.
OUT1-5 (Counter Outputs)
OUT1-5
are
associated
with
individual
counters. Outputs are tri-state and may be
programmed by the counter for output polarity,
initialized to a given state and programmed for
pulse, square wave or complex duty cycle
waveforms.
D0-15 (Data Bus)
D0-15 form a bi-directional 16 bit data bus for
exchanging programming and status informa-
tion with a host processor, or system. These
lines act as inputs to the counter when CS
and WR are asserted and as outputs when
RD and CS are asserted. While CS is de-
asserted these lines are placed in a high
impedance state.
1
6
7
17
18
28
29
39
40



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