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AM41DL6408H Datasheet(PDF) 12 Page - Advanced Micro Devices

No. de pieza AM41DL6408H
Descripción Electrónicos  Stacked Multi-Chip Package (MCP) Flash Memory and SRAM
PDF  66 Pages
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Fabricante Electrónico  AMD [Advanced Micro Devices]
Página de inicio  http://www.amd.com
Logo AMD - Advanced Micro Devices

AM41DL6408H Datasheet(HTML) 12 Page - Advanced Micro Devices

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10
Am41DL6408H
November 24, 2003
ADV ANCE
I N FO RMAT I O N
Table 1.
Device Bus Operations—Flash Word Mode, CIOf = V
IH; SRAM Word Mode, CIOs = VCC
Legend: L = Logic Low = V
IL, H = Logic High = VIH, VID = 11.5–12.5 V, VHH = 9.0 ± 0.5 V, X = Don’t Care, SA = SRAM Address
Input, Byte Mode, SADD = Flash Sector Address, A
IN = Address In, DIN = Data In, DOUT = Data Out
Notes:
1. Other operations except for those indicated in this column are inhibited.
2. Do not apply CE#f = V
IL, CE1#s = VIL and CE2s = VIH at the same time.
3. Don’t care or open LB#s or UB#s.
4. If WP#/ACC = V
IL , the boot sectors will be protected. If WP#/ACC = VIH the boot sectors protection will be removed.
If WP#/ACC = V
ACC (9V), the program time will be reduced by 40%.
5. The sector protect and sector unprotect functions may also be implemented via programming equipment. See the “Sector/Sector
Block Protection and Unprotection” section.
6. If WP#/ACC = V
IL, the two outermost boot sectors remain protected. If WP#/ACC = VIH, the two outermost boot sector protection
depends on whether they were last protected or unprotected using the method described in “Sector/Sector Block Protection and
Unprotection”. If WP#/ACC = V
HH, all sectors will be unprotected.
Operation
(Notes 1, 2)
CE#f CE1#s CE2s OE# WE#
SA
Addr.
LB#s UB#s RESET#
WP#/ACC
(Note 4)
DQ7–
DQ0
DQ15–
DQ8
Read from Flash
L
HX
LH
X
A
IN
XX
H
L/H
D
OUT
D
OUT
XL
Write to Flash
L
HX
HL
X
A
IN
XX
H
(Note 4)
D
IN
D
IN
XL
Standby
V
CC ±
0.3 V
HX
XX
X
X
X
X
V
CC ±
0.3 V
H
High-Z
High-Z
XL
Output Disable
L
L
H
H
H
XXL
X
H
L/H
High-Z
High-Z
HH
X
X
X
L
Flash Hardware
Reset
X
HX
X
X
X
X
X
X
L
L/H
High-Z
High-Z
XL
Sector Protect
(Note 5)
L
HX
HL
X
SADD,
A6 = L,
A1 = H,
A0 = L
XX
V
ID
L/H
D
IN
X
XL
Sector Unprotect
(Note 5)
L
HX
HL
X
SADD,
A6 = H,
A1 = H,
A0 = L
XX
V
ID
(Note 6)
D
IN
X
XL
Temporary Sector
Unprotect
X
HX
XX
X
X
X
X
V
ID
(Note 6)
D
IN
High-Z
XL
Read from SRAM
H
L
H
L
H
X
A
IN
LL
HX
D
OUT
D
OUT
HL
High-Z
D
OUT
LH
D
OUT
High-Z
Write to SRAM
H
L
H
X
L
X
A
IN
LL
HX
D
IN
D
IN
HL
High-Z
D
IN
LH
D
IN
High-Z



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