ZIOL2201 datasheet(29/92 Pages) RENESAS

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ZIOL2xxx Datasheet

April 26, 2016

Write access to the EEPROM. This is the critical step which can lead to corrupt data if interrupted at certain

points in time. Since the valid-flag is cleared the IC can detect this and make sure that no corrupt data are

going to be used unintentionally.

Set the valid-flag. From now on the data are declared as valid.

If the power supply of the IC collapses while writing to the EEPROM or the write access is interrupted by any

other reason, the IC can detect this while power-up due to the cleared valid-flag and can and block the EEPROM

data against further use. Just in case the IC has detected possibly corrupt EEPROM data the configuration

registers will be load with default values which are equal to the initial state (reset values) mentioned in Table 3.7.

3.3.7.1.

EEPROM Error Correction Features

The physical memory array of the EEPROM contains 16 words of 13 bits. In addition to the eight “real” data bits

there are five parity bits which are used as error correction code (ECC). In case one of the data bits changes its

information an automatic single-error correction will be done. Thus the data word (read by the IC system control)

is still correct if this one-bit-error occurs. In order to signal this incident the exception “Eeprom-error” is generated

(stored in bit 4 of the status register[18]).

If a two-bit-error occurs (two bits of the data word are wrong) the ECC cannot correct the memory failure. This

means the in such a situation read data is corrupt. In order to signal this non-recoverable memory failure the

exception “Eeprom_2_error” is generated (stored in bit 3 of the status register[18]).

In summary the ECC features of the EEPROM allow to recognize problems (single bit errors) of the EEPROM

(Eeprom_error exception) without jeopardizing the entire system application. Only for the case that there are

multiple-bit-errors, which are signaled with the “Eeprom_2_error” exception, it is recommended to stop the

application and maintain the application circuit.

3.3.8.

Serial Peripheral Interface (SPI)

3.3.8.1.

SPI Features

The purpose of the SPI interface is to provide access to the memory unit of the IC. Within communication pauses

of the transceiver channels the SPI can be used to retrieve diagnostic data from the IC and/or to reconfigure the

IC, respectively. An active SPI communication causes that the COM communication channel, which shares its

control pins with the SPI interface, cannot change its output value and output status and cannot forward received

signals for exactly the period SPI_EN_L is low (refer to Figure 3.10).

ZIOL2201 Datasheet(PDF) 29 Page - Renesas Technology Corp